net: add rte prefix to ARP structures
[dpdk.git] / drivers / net / i40e / i40e_fdir.c
index b83a0cf..4b32fee 100644 (file)
@@ -525,8 +525,7 @@ i40e_set_flx_pld_cfg(struct i40e_pf *pf,
                flx_ort = (1 << I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) |
                          (num << I40E_GLQF_ORT_FIELD_CNT_SHIFT) |
                          (layer_idx * I40E_MAX_FLXPLD_FIED);
-               I40E_WRITE_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
-               i40e_global_cfg_warning(I40E_WARNING_ENA_FLX_PLD);
+               I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
        }
 
        for (i = 0; i < num; i++) {
@@ -912,7 +911,7 @@ i40e_fdir_construct_pkt(struct i40e_pf *pf,
                 */
                if (fdir_input->flow.l2_flow.ether_type ==
                                rte_cpu_to_be_16(ETHER_TYPE_ARP))
-                       payload += sizeof(struct arp_hdr);
+                       payload += sizeof(struct rte_arp_hdr);
                set_idx = I40E_FLXPLD_L2_IDX;
                break;
        default:
@@ -1198,7 +1197,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf,
                 */
                if (fdir_input->flow.l2_flow.ether_type ==
                                rte_cpu_to_be_16(ETHER_TYPE_ARP))
-                       payload += sizeof(struct arp_hdr);
+                       payload += sizeof(struct rte_arp_hdr);
                set_idx = I40E_FLXPLD_L2_IDX;
        } else if (fdir_input->flow_ext.customized_pctype) {
                /* If customized pctype is used */