net/i40e/base: add new link speed constants

[dpdk.git] / drivers / net / iavf / base / iavf_adminq.c

diff --git a/drivers/net/iavf/base/iavf_adminq.c b/drivers/net/iavf/base/iavf_adminq.c
index 193e2e7..c1668d2 100644 (file)
--- a/drivers/net/iavf/base/iavf_adminq.c
+++ b/drivers/net/iavf/base/iavf_adminq.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2013 - 2015 Intel Corporation
+ * Copyright(c) 2001-2019
  */
 
 #include "iavf_status.h"
@@ -17,18 +17,16 @@
 STATIC void iavf_adminq_init_regs(struct iavf_hw *hw)
 {
        /* set head and tail registers in our local struct */
-       if (iavf_is_vf(hw)) {
-               hw->aq.asq.tail = IAVF_VF_ATQT1;
-               hw->aq.asq.head = IAVF_VF_ATQH1;
-               hw->aq.asq.len  = IAVF_VF_ATQLEN1;
-               hw->aq.asq.bal  = IAVF_VF_ATQBAL1;
-               hw->aq.asq.bah  = IAVF_VF_ATQBAH1;
-               hw->aq.arq.tail = IAVF_VF_ARQT1;
-               hw->aq.arq.head = IAVF_VF_ARQH1;
-               hw->aq.arq.len  = IAVF_VF_ARQLEN1;
-               hw->aq.arq.bal  = IAVF_VF_ARQBAL1;
-               hw->aq.arq.bah  = IAVF_VF_ARQBAH1;
-       }
+       hw->aq.asq.tail = IAVF_VF_ATQT1;
+       hw->aq.asq.head = IAVF_VF_ATQH1;
+       hw->aq.asq.len  = IAVF_VF_ATQLEN1;
+       hw->aq.asq.bal  = IAVF_VF_ATQBAL1;
+       hw->aq.asq.bah  = IAVF_VF_ATQBAH1;
+       hw->aq.arq.tail = IAVF_VF_ARQT1;
+       hw->aq.arq.head = IAVF_VF_ARQH1;
+       hw->aq.arq.len  = IAVF_VF_ARQLEN1;
+       hw->aq.arq.bal  = IAVF_VF_ARQBAL1;
+       hw->aq.arq.bah  = IAVF_VF_ARQBAH1;
 }
 
 /**
@@ -84,6 +82,7 @@ enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw)
  **/
 void iavf_free_adminq_asq(struct iavf_hw *hw)
 {
+       iavf_free_virt_mem(hw, &hw->aq.asq.cmd_buf);
        iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf);
 }
 
@@ -264,14 +263,8 @@ STATIC enum iavf_status iavf_config_asq_regs(struct iavf_hw *hw)
        wr32(hw, hw->aq.asq.tail, 0);
 
        /* set starting point */
-#ifdef INTEGRATED_VF
-       if (iavf_is_vf(hw))
-               wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
-                                         IAVF_VF_ATQLEN1_ATQENABLE_MASK));
-#else
        wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |
                                  IAVF_VF_ATQLEN1_ATQENABLE_MASK));
-#endif /* INTEGRATED_VF */
        wr32(hw, hw->aq.asq.bal, IAVF_LO_DWORD(hw->aq.asq.desc_buf.pa));
        wr32(hw, hw->aq.asq.bah, IAVF_HI_DWORD(hw->aq.asq.desc_buf.pa));
 
@@ -299,14 +292,8 @@ STATIC enum iavf_status iavf_config_arq_regs(struct iavf_hw *hw)
        wr32(hw, hw->aq.arq.tail, 0);
 
        /* set starting point */
-#ifdef INTEGRATED_VF
-       if (iavf_is_vf(hw))
-               wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
-                                         IAVF_VF_ARQLEN1_ARQENABLE_MASK));
-#else
        wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |
                                  IAVF_VF_ARQLEN1_ARQENABLE_MASK));
-#endif /* INTEGRATED_VF */
        wr32(hw, hw->aq.arq.bal, IAVF_LO_DWORD(hw->aq.arq.desc_buf.pa));
        wr32(hw, hw->aq.arq.bah, IAVF_HI_DWORD(hw->aq.arq.desc_buf.pa));
 
@@ -367,7 +354,7 @@ enum iavf_status iavf_init_asq(struct iavf_hw *hw)
        /* initialize base registers */
        ret_code = iavf_config_asq_regs(hw);
        if (ret_code != IAVF_SUCCESS)
-               goto init_adminq_free_rings;
+               goto init_config_regs;
 
        /* success! */
        hw->aq.asq.count = hw->aq.num_asq_entries;
@@ -375,6 +362,10 @@ enum iavf_status iavf_init_asq(struct iavf_hw *hw)
 
 init_adminq_free_rings:
        iavf_free_adminq_asq(hw);
+       return ret_code;
+
+init_config_regs:
+       iavf_free_asq_bufs(hw);
 
 init_adminq_exit:
        return ret_code;
@@ -549,8 +540,6 @@ enum iavf_status iavf_init_adminq(struct iavf_hw *hw)
        if (ret_code != IAVF_SUCCESS)
                goto init_adminq_free_asq;
 
-       ret_code = IAVF_SUCCESS;
-
        /* success! */
        goto init_adminq_exit;
 
@@ -580,9 +569,6 @@ enum iavf_status iavf_shutdown_adminq(struct iavf_hw *hw)
        iavf_destroy_spinlock(&hw->aq.asq_spinlock);
        iavf_destroy_spinlock(&hw->aq.arq_spinlock);
 
-       if (hw->nvm_buff.va)
-               iavf_free_virt_mem(hw, &hw->nvm_buff);
-
        return ret_code;
 }
 
@@ -817,6 +803,8 @@ enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,
                cmd_completed = true;
                if ((enum iavf_admin_queue_err)retval == IAVF_AQ_RC_OK)
                        status = IAVF_SUCCESS;
+               else if ((enum iavf_admin_queue_err)retval == IAVF_AQ_RC_EBUSY)
+                       status = IAVF_ERR_NOT_READY;
                else
                        status = IAVF_ERR_ADMIN_QUEUE_ERROR;
                hw->aq.asq_last_status = (enum iavf_admin_queue_err)retval;
@@ -904,14 +892,7 @@ enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,
        }
 
        /* set next_to_use to head */
-#ifdef INTEGRATED_VF
-       if (!iavf_is_vf(hw))
-               ntu = rd32(hw, hw->aq.arq.head) & IAVF_PF_ARQH_ARQH_MASK;
-       else
-               ntu = rd32(hw, hw->aq.arq.head) & IAVF_VF_ARQH1_ARQH_MASK;
-#else
        ntu = rd32(hw, hw->aq.arq.head) & IAVF_VF_ARQH1_ARQH_MASK;
-#endif /* INTEGRATED_VF */
        if (ntu == ntc) {
                /* nothing to do - shouldn't need to update ring's values */
                ret_code = IAVF_ERR_ADMIN_QUEUE_NO_WORK;