/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2019
+ * Copyright(c) 2001-2021 Intel Corporation
*/
#ifndef _ICE_SWITCH_H_
#define ICE_FLTR_TX BIT(1)
#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
+/* Switch Profile IDs for Profile related switch rules */
+#define ICE_PROFID_IPV4_TCP 4
+#define ICE_PROFID_IPV4_UDP 5
+#define ICE_PROFID_IPV6_TCP 7
+#define ICE_PROFID_IPV6_UDP 8
+#define ICE_PROFID_PPPOE_PAY 34
+#define ICE_PROFID_PPPOE_IPV4_TCP 35
+#define ICE_PROFID_PPPOE_IPV4_UDP 36
+#define ICE_PROFID_PPPOE_IPV4_OTHER 37
+#define ICE_PROFID_PPPOE_IPV6_TCP 38
+#define ICE_PROFID_PPPOE_IPV6_UDP 39
+#define ICE_PROFID_PPPOE_IPV6_OTHER 40
+#define ICE_PROFID_IPV4_GTPC_TEID 41
+#define ICE_PROFID_IPV4_GTPU_TEID 43
+#define ICE_PROFID_IPV6_GTPU_TEID 46
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER 47
+#define ICE_PROFID_IPV4_GTPU_IPV4_OTHER 48
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_UDP 49
+#define ICE_PROFID_IPV4_GTPU_IPV4_UDP 50
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_TCP 51
+#define ICE_PROFID_IPV4_GTPU_IPV4_TCP 52
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_OTHER 53
+#define ICE_PROFID_IPV6_GTPU_IPV4_OTHER 54
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_UDP 55
+#define ICE_PROFID_IPV6_GTPU_IPV4_UDP 56
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_TCP 57
+#define ICE_PROFID_IPV6_GTPU_IPV4_TCP 58
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_OTHER 59
+#define ICE_PROFID_IPV4_GTPU_IPV6_OTHER 60
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_UDP 61
+#define ICE_PROFID_IPV4_GTPU_IPV6_UDP 62
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_TCP 63
+#define ICE_PROFID_IPV4_GTPU_IPV6_TCP 64
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_OTHER 65
+#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER 66
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_UDP 67
+#define ICE_PROFID_IPV6_GTPU_IPV6_UDP 68
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_TCP 69
+#define ICE_PROFID_IPV6_GTPU_IPV6_TCP 70
+#define ICE_PROFID_IPV4_ESP 71
+#define ICE_PROFID_IPV6_ESP 72
+#define ICE_PROFID_IPV4_AH 73
+#define ICE_PROFID_IPV6_AH 74
+#define ICE_PROFID_IPV4_NAT_T 75
+#define ICE_PROFID_IPV6_NAT_T 76
+#define ICE_PROFID_MAC_IPV4_L2TPV3 77
+#define ICE_PROFID_MAC_IPV6_L2TPV3 78
+#define ICE_PROFID_IPV4_PFCP_NODE 79
+#define ICE_PROFID_IPV4_PFCP_SESSION 80
+#define ICE_PROFID_IPV6_PFCP_NODE 81
+#define ICE_PROFID_IPV6_PFCP_SESSION 82
+
+#define DUMMY_ETH_HDR_LEN 16
+#define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr) + \
+ (DUMMY_ETH_HDR_LEN * \
+ sizeof(((struct ice_sw_rule_lkup_rx_tx *)0)->hdr[0])))
+#define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr))
+#define ICE_SW_RULE_LG_ACT_SIZE(n) \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.lg_act.act) + \
+ ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act[0])))
+#define ICE_SW_RULE_VSI_LIST_SIZE(n) \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.vsi_list.vsi) + \
+ ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi[0])))
/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
#define ICE_MAX_RES_TYPES 0x80
*/
u16 q_id:11;
u16 hw_vsi_id:10;
- u16 vsi_id:10;
u16 vsi_list_id:10;
} fwd_id;
/* Profiles this recipe should be associated with */
struct LIST_HEAD_TYPE fv_list;
-#define ICE_MAX_NUM_PROFILES 256
/* Profiles this recipe is associated with */
u8 num_profs, *prof_ids;
- /* Possible result indexes are 44, 45, 46 and 47 */
-#define ICE_POSSIBLE_RES_IDX 0x0000F00000000000ULL
+ /* Bit map for possible result indexes */
ice_declare_bitmap(res_idxs, ICE_MAX_FV_WORDS);
/* This allows user to specify the recipe priority.
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
+enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);
+enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);
enum ice_status
ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
u16 *counter_id);
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
- u16 buf_size, struct ice_sq_cd *cd);
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
+ struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
enum ice_status
ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
- struct ice_aqc_get_allocd_res_desc_resp *buf,
- u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
- struct ice_sq_cd *cd);
+ struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
+ bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status
ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
-
/* Promisc/defport setup for VSIs */
enum ice_status
ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
-enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
+enum ice_status
+ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+ u16 vsi_handle);
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
-
+bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
#endif /* _ICE_SWITCH_H_ */
git.droids-corp.org / dpdk.git / blobdiff