/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001-2018
+ * Copyright(c) 2001-2021 Intel Corporation
*/
#ifndef _ICE_SWITCH_H_
#define ICE_SW_CFG_MAX_BUF_LEN 2048
#define ICE_MAX_SW 256
#define ICE_DFLT_VSI_INVAL 0xff
+#define ICE_FLTR_RX BIT(0)
+#define ICE_FLTR_TX BIT(1)
+#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
-
+/* Switch Profile IDs for Profile related switch rules */
+#define ICE_PROFID_IPV4_TCP 4
+#define ICE_PROFID_IPV4_UDP 5
+#define ICE_PROFID_IPV6_TCP 7
+#define ICE_PROFID_IPV6_UDP 8
+#define ICE_PROFID_PPPOE_PAY 34
+#define ICE_PROFID_PPPOE_IPV4_TCP 35
+#define ICE_PROFID_PPPOE_IPV4_UDP 36
+#define ICE_PROFID_PPPOE_IPV4_OTHER 37
+#define ICE_PROFID_PPPOE_IPV6_TCP 38
+#define ICE_PROFID_PPPOE_IPV6_UDP 39
+#define ICE_PROFID_PPPOE_IPV6_OTHER 40
+#define ICE_PROFID_IPV4_GTPC_TEID 41
+#define ICE_PROFID_IPV4_GTPU_TEID 43
+#define ICE_PROFID_IPV6_GTPU_TEID 46
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER 47
+#define ICE_PROFID_IPV4_GTPU_IPV4_OTHER 48
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_UDP 49
+#define ICE_PROFID_IPV4_GTPU_IPV4_UDP 50
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_TCP 51
+#define ICE_PROFID_IPV4_GTPU_IPV4_TCP 52
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_OTHER 53
+#define ICE_PROFID_IPV6_GTPU_IPV4_OTHER 54
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_UDP 55
+#define ICE_PROFID_IPV6_GTPU_IPV4_UDP 56
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_TCP 57
+#define ICE_PROFID_IPV6_GTPU_IPV4_TCP 58
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_OTHER 59
+#define ICE_PROFID_IPV4_GTPU_IPV6_OTHER 60
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_UDP 61
+#define ICE_PROFID_IPV4_GTPU_IPV6_UDP 62
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_TCP 63
+#define ICE_PROFID_IPV4_GTPU_IPV6_TCP 64
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_OTHER 65
+#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER 66
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_UDP 67
+#define ICE_PROFID_IPV6_GTPU_IPV6_UDP 68
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_TCP 69
+#define ICE_PROFID_IPV6_GTPU_IPV6_TCP 70
+#define ICE_PROFID_IPV4_ESP 71
+#define ICE_PROFID_IPV6_ESP 72
+#define ICE_PROFID_IPV4_AH 73
+#define ICE_PROFID_IPV6_AH 74
+#define ICE_PROFID_IPV4_NAT_T 75
+#define ICE_PROFID_IPV6_NAT_T 76
+#define ICE_PROFID_MAC_IPV4_L2TPV3 77
+#define ICE_PROFID_MAC_IPV6_L2TPV3 78
+#define ICE_PROFID_IPV4_PFCP_NODE 79
+#define ICE_PROFID_IPV4_PFCP_SESSION 80
+#define ICE_PROFID_IPV6_PFCP_NODE 81
+#define ICE_PROFID_IPV6_PFCP_SESSION 82
+
+#define DUMMY_ETH_HDR_LEN 16
+#define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr) + \
+ (DUMMY_ETH_HDR_LEN * \
+ sizeof(((struct ice_sw_rule_lkup_rx_tx *)0)->hdr[0])))
+#define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr))
+#define ICE_SW_RULE_LG_ACT_SIZE(n) \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.lg_act.act) + \
+ ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act[0])))
+#define ICE_SW_RULE_VSI_LIST_SIZE(n) \
+ (offsetof(struct ice_aqc_sw_rules_elem, pdata.vsi_list.vsi) + \
+ ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi[0])))
+
+/* Worst case buffer length for ice_aqc_opc_get_res_alloc */
+#define ICE_MAX_RES_TYPES 0x80
+#define ICE_AQ_GET_RES_ALLOC_BUF_LEN \
+ (ICE_MAX_RES_TYPES * sizeof(struct ice_aqc_get_res_resp_elem))
#define ICE_VSI_INVAL_ID 0xFFFF
+#define ICE_INVAL_Q_HANDLE 0xFFFF
/* VSI context structure for add/get/update/free operations */
struct ice_vsi_ctx {
struct ice_aqc_vsi_props info;
struct ice_sched_vsi_info sched;
u8 alloc_from_pool;
- struct ice_lock rss_locks; /* protect rss config in VSI ctx */
- struct LIST_HEAD_TYPE rss_list_head;
+ u16 num_lan_q_entries[ICE_MAX_TRAFFIC_CLASS];
+ struct ice_q_ctx *lan_q_ctx[ICE_MAX_TRAFFIC_CLASS];
};
+/* This is to be used by add/update mirror rule Admin Queue command */
+struct ice_mir_rule_buf {
+ u16 vsi_idx; /* VSI index */
+
+ /* For each VSI, user can specify whether corresponding VSI
+ * should be added/removed to/from mirror rule
+ *
+ * add mirror rule: this should always be TRUE.
+ * update mirror rule: add(true) or remove(false) VSI to/from
+ * mirror rule
+ */
+ u8 add;
+};
/* Switch recipe ID enum values are specific to hardware */
enum ice_sw_lkup_type {
/* rule ID returned by firmware once filter rule is created */
u16 fltr_rule_id;
u16 flag;
-#define ICE_FLTR_RX BIT(0)
-#define ICE_FLTR_TX BIT(1)
-#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
/* Source VSI for LOOKUP_TX or source port for LOOKUP_RX */
u16 src;
*/
u16 q_id:11;
u16 hw_vsi_id:10;
- u16 vsi_id:10;
u16 vsi_list_id:10;
} fwd_id;
/* Source VSI for LOOKUP_TX or source port for LOOKUP_RX */
u16 src;
u16 flag;
-#define ICE_FLTR_RX BIT(0)
-#define ICE_FLTR_TX BIT(1)
-#define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
-
enum ice_sw_fwd_act_type fltr_act;
/* Depending on filter action */
union {
u8 qgrp_size;
};
+struct ice_rule_query_data {
+ /* Recipe ID for which the requested rule was added */
+ u16 rid;
+ /* Rule ID that was added or is supposed to be removed */
+ u16 rule_id;
+ /* vsi_handle for which Rule was added or is supposed to be removed */
+ u16 vsi_handle;
+};
+
struct ice_adv_rule_info {
enum ice_sw_tunnel_type tun_type;
struct ice_sw_act_ctrl sw_act;
u32 priority;
u8 rx; /* true means LOOKUP_RX otherwise LOOKUP_TX */
+ u16 fltr_rule_id;
};
/* A collection of one or more four word recipe */
/* For a chained recipe the root recipe is what should be used for
* programming rules
*/
+ u8 is_root;
u8 root_rid;
u8 recp_created;
* recipe
*/
struct ice_fv_word ext_words[ICE_MAX_CHAIN_WORDS];
+ u16 word_masks[ICE_MAX_CHAIN_WORDS];
/* if this recipe is a collection of other recipe */
u8 big_recp;
/* Profiles this recipe is associated with */
u8 num_profs, *prof_ids;
+ /* Bit map for possible result indexes */
+ ice_declare_bitmap(res_idxs, ICE_MAX_FV_WORDS);
+
/* This allows user to specify the recipe priority.
* For now, this becomes 'fwd_priority' when recipe
* is created, usually recipes can have 'fwd' and 'join'
struct ice_adv_lkup_elem *lkups;
struct ice_adv_rule_info rule_info;
u16 lkups_cnt;
+ struct ice_vsi_list_map_info *vsi_list_info;
+ u16 vsi_count;
};
enum ice_promisc_flags {
/* VSI related commands */
enum ice_status
+ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ bool keep_vsi_alloc, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,
struct ice_sq_cd *cd);
enum ice_status
struct ice_sq_cd *cd);
struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);
void ice_clear_all_vsi_ctx(struct ice_hw *hw);
+enum ice_status
+ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
+ u16 count, struct ice_mir_rule_buf *mr_buf,
+ struct ice_sq_cd *cd, u16 *rule_id);
+enum ice_status
+ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,
+ u32 *ctl_bitmask);
+enum ice_status
+ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
+ u32 ctl_bitmask);
/* Switch config */
enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw);
ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);
enum ice_status
ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);
+enum ice_status
+ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 *counter_id);
+enum ice_status
+ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
+ u16 counter_id);
/* Switch/bridge related commands */
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);
+enum ice_status ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);
+enum ice_status ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);
enum ice_status
ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
u16 *counter_id);
enum ice_status
ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
enum ice_status
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
+ struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
+ struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
+ struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
+ bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
+enum ice_status
ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
+enum ice_status
+ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
+void ice_rem_all_sw_rules_info(struct ice_hw *hw);
enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);
enum ice_status
-ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
-#ifndef NO_MACVLAN_SUPPORT
+ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
+enum ice_status
+ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);
enum ice_status
ice_add_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
enum ice_status
ice_remove_mac_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);
-#endif /* !NO_MACVLAN_SUPPORT */
+enum ice_status
+ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,
+ u16 sw_marker);
+enum ice_status
+ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);
void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);
-
/* Promisc/defport setup for VSIs */
enum ice_status
ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
bool rm_vlan_promisc);
+/* Get VSIs Promisc/defport settings */
+enum ice_status
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+ u16 *vid);
+enum ice_status
+ice_aq_add_recipe(struct ice_hw *hw,
+ struct ice_aqc_recipe_data_elem *s_recipe_list,
+ u16 num_recipes, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_get_recipe(struct ice_hw *hw,
+ struct ice_aqc_recipe_data_elem *s_recipe_list,
+ u16 *num_recipes, u16 recipe_root, struct ice_sq_cd *cd);
+enum ice_status
+ice_aq_map_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
+ struct ice_sq_cd *cd);
+
+enum ice_status
+ice_aq_get_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u8 *r_bitmap,
+ struct ice_sq_cd *cd);
+
+enum ice_status ice_alloc_recipe(struct ice_hw *hw, u16 *recipe_id);
+enum ice_status
+ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
+ u16 lkups_cnt, struct ice_adv_rule_info *rinfo,
+ struct ice_rule_query_data *added_entry);
+enum ice_status
+ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status
+ice_rem_adv_rule_by_id(struct ice_hw *hw,
+ struct ice_rule_query_data *remove_entry);
+enum ice_status
+ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
+ u16 lkups_cnt, struct ice_adv_rule_info *rinfo);
+enum ice_status ice_replay_all_fltr(struct ice_hw *hw);
-enum ice_status ice_init_def_sw_recp(struct ice_hw *hw);
+enum ice_status
+ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+ u16 vsi_handle);
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
-
+bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
#endif /* _ICE_SWITCH_H_ */
git.droids-corp.org / dpdk.git / blobdiff