#define IGC_INTEL_VENDOR_ID 0x8086
-/*
- * The overhead from MTU to max frame size.
- * Considering VLAN so tag needs to be counted.
- */
-#define IGC_ETH_OVERHEAD (RTE_ETHER_HDR_LEN + \
- RTE_ETHER_CRC_LEN + VLAN_TAG_SIZE)
-
#define IGC_FC_PAUSE_TIME 0x0680
#define IGC_LINK_UPDATE_CHECK_TIMEOUT 90 /* 9s */
#define IGC_LINK_UPDATE_CHECK_INTERVAL 100 /* ms */
struct rte_eth_xstat_name *xstats_names,
unsigned int size);
static int eth_igc_xstats_get_names_by_id(struct rte_eth_dev *dev,
- struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
+ const uint64_t *ids, struct rte_eth_xstat_name *xstats_names,
unsigned int limit);
static int eth_igc_xstats_reset(struct rte_eth_dev *dev);
static int
PMD_INIT_FUNC_TRACE();
+ if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+ dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+
ret = igc_check_mq_mode(dev);
if (ret != 0)
return ret;
hw->mac.autoneg = 1;
} else {
int num_speeds = 0;
- bool autoneg = (*speeds & ETH_LINK_SPEED_FIXED) == 0;
- /* Reset */
+ if (*speeds & ETH_LINK_SPEED_FIXED) {
+ PMD_DRV_LOG(ERR,
+ "Force speed mode currently not supported");
+ igc_dev_clear_queues(dev);
+ return -EINVAL;
+ }
+
hw->phy.autoneg_advertised = 0;
+ hw->mac.autoneg = 1;
if (*speeds & ~(ETH_LINK_SPEED_10M_HD | ETH_LINK_SPEED_10M |
ETH_LINK_SPEED_100M_HD | ETH_LINK_SPEED_100M |
- ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G |
- ETH_LINK_SPEED_FIXED)) {
+ ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G)) {
num_speeds = -1;
goto error_invalid_config;
}
hw->phy.autoneg_advertised |= ADVERTISE_2500_FULL;
num_speeds++;
}
- if (num_speeds == 0 || (!autoneg && num_speeds > 1))
+ if (num_speeds == 0)
goto error_invalid_config;
-
- /* Set/reset the mac.autoneg based on the link speed,
- * fixed or not
- */
- if (!autoneg) {
- hw->mac.autoneg = 0;
- hw->mac.forced_speed_duplex =
- hw->phy.autoneg_advertised;
- } else {
- hw->mac.autoneg = 1;
- }
}
igc_setup_link(hw);
uint16_t i;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
- eth_igc_rx_queue_release(dev->data->rx_queues[i]);
+ eth_igc_rx_queue_release(dev, i);
dev->data->rx_queues[i] = NULL;
}
dev->data->nb_rx_queues = 0;
for (i = 0; i < dev->data->nb_tx_queues; i++) {
- eth_igc_tx_queue_release(dev->data->tx_queues[i]);
+ eth_igc_tx_queue_release(dev, i);
dev->data->tx_queues[i] = NULL;
}
dev->data->nb_tx_queues = 0;
PMD_INIT_FUNC_TRACE();
dev->dev_ops = ð_igc_ops;
- dev->rx_descriptor_done = eth_igc_rx_descriptor_done;
dev->rx_queue_count = eth_igc_rx_queue_count;
dev->rx_descriptor_status = eth_igc_rx_descriptor_status;
dev->tx_descriptor_status = eth_igc_tx_descriptor_status;
fw.eep_build);
}
}
+ if (ret < 0)
+ return -EINVAL;
ret += 1; /* add the size of '\0' */
- if (fw_size < (u32)ret)
+ if (fw_size < (size_t)ret)
return ret;
else
return 0;
/* switch to jumbo mode if needed */
if (mtu > RTE_ETHER_MTU) {
- dev->data->dev_conf.rxmode.offloads |=
- DEV_RX_OFFLOAD_JUMBO_FRAME;
+ dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
rctl |= IGC_RCTL_LPE;
} else {
- dev->data->dev_conf.rxmode.offloads &=
- ~DEV_RX_OFFLOAD_JUMBO_FRAME;
+ dev->data->dev_conf.rxmode.offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
rctl &= ~IGC_RCTL_LPE;
}
IGC_WRITE_REG(hw, IGC_RCTL, rctl);
- /* update max frame size */
- dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
-
- IGC_WRITE_REG(hw, IGC_RLPML,
- dev->data->dev_conf.rxmode.max_rx_pkt_len);
+ IGC_WRITE_REG(hw, IGC_RLPML, frame_size);
return 0;
}
/* Rx Errors */
rte_stats->imissed = stats->mpc;
- rte_stats->ierrors = stats->crcerrs +
- stats->rlec + stats->ruc + stats->roc +
+ rte_stats->ierrors = stats->crcerrs + stats->rlec +
stats->rxerrc + stats->algnerrc;
/* Tx Errors */
static int
eth_igc_xstats_get_names_by_id(struct rte_eth_dev *dev,
- struct rte_eth_xstat_name *xstats_names, const uint64_t *ids,
+ const uint64_t *ids, struct rte_eth_xstat_name *xstats_names,
unsigned int limit)
{
unsigned int i;
igc_vlan_hw_extend_disable(struct rte_eth_dev *dev)
{
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
+ uint32_t frame_size = dev->data->mtu + IGC_ETH_OVERHEAD;
uint32_t ctrl_ext;
ctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT);
if ((ctrl_ext & IGC_CTRL_EXT_EXT_VLAN) == 0)
return 0;
- if ((dev->data->dev_conf.rxmode.offloads &
- DEV_RX_OFFLOAD_JUMBO_FRAME) == 0)
- goto write_ext_vlan;
-
/* Update maximum packet length */
- if (dev->data->dev_conf.rxmode.max_rx_pkt_len <
- RTE_ETHER_MIN_MTU + VLAN_TAG_SIZE) {
+ if (frame_size < RTE_ETHER_MIN_MTU + VLAN_TAG_SIZE) {
PMD_DRV_LOG(ERR, "Maximum packet length %u error, min is %u",
- dev->data->dev_conf.rxmode.max_rx_pkt_len,
- VLAN_TAG_SIZE + RTE_ETHER_MIN_MTU);
+ frame_size, VLAN_TAG_SIZE + RTE_ETHER_MIN_MTU);
return -EINVAL;
}
- dev->data->dev_conf.rxmode.max_rx_pkt_len -= VLAN_TAG_SIZE;
- IGC_WRITE_REG(hw, IGC_RLPML,
- dev->data->dev_conf.rxmode.max_rx_pkt_len);
+ IGC_WRITE_REG(hw, IGC_RLPML, frame_size - VLAN_TAG_SIZE);
-write_ext_vlan:
IGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext & ~IGC_CTRL_EXT_EXT_VLAN);
return 0;
}
igc_vlan_hw_extend_enable(struct rte_eth_dev *dev)
{
struct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);
+ uint32_t frame_size = dev->data->mtu + IGC_ETH_OVERHEAD;
uint32_t ctrl_ext;
ctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT);
if (ctrl_ext & IGC_CTRL_EXT_EXT_VLAN)
return 0;
- if ((dev->data->dev_conf.rxmode.offloads &
- DEV_RX_OFFLOAD_JUMBO_FRAME) == 0)
- goto write_ext_vlan;
-
/* Update maximum packet length */
- if (dev->data->dev_conf.rxmode.max_rx_pkt_len >
- MAX_RX_JUMBO_FRAME_SIZE - VLAN_TAG_SIZE) {
+ if (frame_size > MAX_RX_JUMBO_FRAME_SIZE) {
PMD_DRV_LOG(ERR, "Maximum packet length %u error, max is %u",
- dev->data->dev_conf.rxmode.max_rx_pkt_len +
- VLAN_TAG_SIZE, MAX_RX_JUMBO_FRAME_SIZE);
+ frame_size, MAX_RX_JUMBO_FRAME_SIZE);
return -EINVAL;
}
- dev->data->dev_conf.rxmode.max_rx_pkt_len += VLAN_TAG_SIZE;
- IGC_WRITE_REG(hw, IGC_RLPML,
- dev->data->dev_conf.rxmode.max_rx_pkt_len);
+ IGC_WRITE_REG(hw, IGC_RLPML, frame_size);
-write_ext_vlan:
IGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext | IGC_CTRL_EXT_EXT_VLAN);
return 0;
}