*/
#include <rte_config.h>
+#include <rte_flow.h>
#include <rte_malloc.h>
#include <ethdev_driver.h>
#include <rte_net.h>
* This needs to be done after enable.
*/
for (i = 0; i < dev->data->nb_rx_queues; i++) {
+ uint32_t dvmolr;
+
rxq = dev->data->rx_queues[i];
IGC_WRITE_REG(hw, IGC_RDH(rxq->reg_idx), 0);
- IGC_WRITE_REG(hw, IGC_RDT(rxq->reg_idx),
- rxq->nb_rx_desc - 1);
+ IGC_WRITE_REG(hw, IGC_RDT(rxq->reg_idx), rxq->nb_rx_desc - 1);
- /* strip queue vlan offload */
- if (rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
- uint32_t dvmolr;
- dvmolr = IGC_READ_REG(hw, IGC_DVMOLR(rxq->queue_id));
+ dvmolr = IGC_READ_REG(hw, IGC_DVMOLR(rxq->reg_idx));
+ if (rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
+ dvmolr |= IGC_DVMOLR_STRVLAN;
+ else
+ dvmolr &= ~IGC_DVMOLR_STRVLAN;
- /* If vlan been stripped off, the CRC is meaningless. */
- dvmolr |= IGC_DVMOLR_STRVLAN | IGC_DVMOLR_STRCRC;
- IGC_WRITE_REG(hw, IGC_DVMOLR(rxq->reg_idx), dvmolr);
- }
+ if (offloads & DEV_RX_OFFLOAD_KEEP_CRC)
+ dvmolr &= ~IGC_DVMOLR_STRCRC;
+ else
+ dvmolr |= IGC_DVMOLR_STRCRC;
+
+ IGC_WRITE_REG(hw, IGC_DVMOLR(rxq->reg_idx), dvmolr);
}
return 0;
return i;
}
-#ifdef RTE_LIBRTE_ETHDEV_DEBUG
+#ifdef RTE_ETHDEV_DEBUG_TX
ret = rte_validate_tx_offload(m);
if (ret != 0) {
rte_errno = -ret;
reg_val = IGC_READ_REG(hw, IGC_DVMOLR(rx_queue_id));
if (on) {
- /* If vlan been stripped off, the CRC is meaningless. */
- reg_val |= IGC_DVMOLR_STRVLAN | IGC_DVMOLR_STRCRC;
+ reg_val |= IGC_DVMOLR_STRVLAN;
rxq->offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
} else {
- reg_val &= ~(IGC_DVMOLR_STRVLAN | IGC_DVMOLR_HIDVLAN |
- IGC_DVMOLR_STRCRC);
+ reg_val &= ~(IGC_DVMOLR_STRVLAN | IGC_DVMOLR_HIDVLAN);
rxq->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
}