ethdev: add namespace
[dpdk.git] / drivers / net / ixgbe / rte_pmd_ixgbe.c
index 9514f2c..9729f85 100644 (file)
@@ -2,7 +2,7 @@
  * Copyright(c) 2010-2017 Intel Corporation
  */
 
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 
 #include "base/ixgbe_api.h"
 #include "base/ixgbe_x550.h"
@@ -303,10 +303,10 @@ rte_pmd_ixgbe_set_vf_vlan_stripq(uint16_t port, uint16_t vf, uint8_t on)
         */
        if (hw->mac.type == ixgbe_mac_82598EB)
                queues_per_pool = (uint16_t)hw->mac.max_rx_queues /
-                                 ETH_16_POOLS;
+                                 RTE_ETH_16_POOLS;
        else
                queues_per_pool = (uint16_t)hw->mac.max_rx_queues /
-                                 ETH_64_POOLS;
+                                 RTE_ETH_64_POOLS;
 
        for (q = 0; q < queues_per_pool; q++)
                (*dev->dev_ops->vlan_strip_queue_set)(dev,
@@ -515,9 +515,8 @@ rte_pmd_ixgbe_set_vf_rate_limit(uint16_t port, uint16_t vf,
 int
 rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp)
 {
-       struct ixgbe_hw *hw;
        struct rte_eth_dev *dev;
-       uint32_t ctrl;
+       struct ixgbe_macsec_setting macsec_setting;
 
        RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 
@@ -526,71 +525,13 @@ rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp)
        if (!is_ixgbe_supported(dev))
                return -ENOTSUP;
 
-       hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+       macsec_setting.offload_en = 1;
+       macsec_setting.encrypt_en = en;
+       macsec_setting.replayprotect_en = rp;
 
-       /* Stop the data paths */
-       if (ixgbe_disable_sec_rx_path(hw) != IXGBE_SUCCESS)
-               return -ENOTSUP;
-       /**
-        * Workaround:
-        * As no ixgbe_disable_sec_rx_path equivalent is
-        * implemented for tx in the base code, and we are
-        * not allowed to modify the base code in DPDK, so
-        * just call the hand-written one directly for now.
-        * The hardware support has been checked by
-        * ixgbe_disable_sec_rx_path().
-        */
-       ixgbe_disable_sec_tx_path_generic(hw);
-
-       /* Enable Ethernet CRC (required by MACsec offload) */
-       ctrl = IXGBE_READ_REG(hw, IXGBE_HLREG0);
-       ctrl |= IXGBE_HLREG0_TXCRCEN | IXGBE_HLREG0_RXCRCSTRP;
-       IXGBE_WRITE_REG(hw, IXGBE_HLREG0, ctrl);
-
-       /* Enable the TX and RX crypto engines */
-       ctrl = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
-       ctrl &= ~IXGBE_SECTXCTRL_SECTX_DIS;
-       IXGBE_WRITE_REG(hw, IXGBE_SECTXCTRL, ctrl);
-
-       ctrl = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
-       ctrl &= ~IXGBE_SECRXCTRL_SECRX_DIS;
-       IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, ctrl);
-
-       ctrl = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
-       ctrl &= ~IXGBE_SECTX_MINSECIFG_MASK;
-       ctrl |= 0x3;
-       IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, ctrl);
-
-       /* Enable SA lookup */
-       ctrl = IXGBE_READ_REG(hw, IXGBE_LSECTXCTRL);
-       ctrl &= ~IXGBE_LSECTXCTRL_EN_MASK;
-       ctrl |= en ? IXGBE_LSECTXCTRL_AUTH_ENCRYPT :
-                    IXGBE_LSECTXCTRL_AUTH;
-       ctrl |= IXGBE_LSECTXCTRL_AISCI;
-       ctrl &= ~IXGBE_LSECTXCTRL_PNTHRSH_MASK;
-       ctrl |= IXGBE_MACSEC_PNTHRSH & IXGBE_LSECTXCTRL_PNTHRSH_MASK;
-       IXGBE_WRITE_REG(hw, IXGBE_LSECTXCTRL, ctrl);
-
-       ctrl = IXGBE_READ_REG(hw, IXGBE_LSECRXCTRL);
-       ctrl &= ~IXGBE_LSECRXCTRL_EN_MASK;
-       ctrl |= IXGBE_LSECRXCTRL_STRICT << IXGBE_LSECRXCTRL_EN_SHIFT;
-       ctrl &= ~IXGBE_LSECRXCTRL_PLSH;
-       if (rp)
-               ctrl |= IXGBE_LSECRXCTRL_RP;
-       else
-               ctrl &= ~IXGBE_LSECRXCTRL_RP;
-       IXGBE_WRITE_REG(hw, IXGBE_LSECRXCTRL, ctrl);
-
-       /* Start the data paths */
-       ixgbe_enable_sec_rx_path(hw);
-       /**
-        * Workaround:
-        * As no ixgbe_enable_sec_rx_path equivalent is
-        * implemented for tx in the base code, and we are
-        * not allowed to modify the base code in DPDK, so
-        * just call the hand-written one directly for now.
-        */
-       ixgbe_enable_sec_tx_path_generic(hw);
+       ixgbe_dev_macsec_setting_save(dev, &macsec_setting);
+
+       ixgbe_dev_macsec_register_enable(dev, &macsec_setting);
 
        return 0;
 }
@@ -598,9 +539,7 @@ rte_pmd_ixgbe_macsec_enable(uint16_t port, uint8_t en, uint8_t rp)
 int
 rte_pmd_ixgbe_macsec_disable(uint16_t port)
 {
-       struct ixgbe_hw *hw;
        struct rte_eth_dev *dev;
-       uint32_t ctrl;
 
        RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
 
@@ -609,52 +548,9 @@ rte_pmd_ixgbe_macsec_disable(uint16_t port)
        if (!is_ixgbe_supported(dev))
                return -ENOTSUP;
 
-       hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+       ixgbe_dev_macsec_setting_reset(dev);
 
-       /* Stop the data paths */
-       if (ixgbe_disable_sec_rx_path(hw) != IXGBE_SUCCESS)
-               return -ENOTSUP;
-       /**
-        * Workaround:
-        * As no ixgbe_disable_sec_rx_path equivalent is
-        * implemented for tx in the base code, and we are
-        * not allowed to modify the base code in DPDK, so
-        * just call the hand-written one directly for now.
-        * The hardware support has been checked by
-        * ixgbe_disable_sec_rx_path().
-        */
-       ixgbe_disable_sec_tx_path_generic(hw);
-
-       /* Disable the TX and RX crypto engines */
-       ctrl = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL);
-       ctrl |= IXGBE_SECTXCTRL_SECTX_DIS;
-       IXGBE_WRITE_REG(hw, IXGBE_SECTXCTRL, ctrl);
-
-       ctrl = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);
-       ctrl |= IXGBE_SECRXCTRL_SECRX_DIS;
-       IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, ctrl);
-
-       /* Disable SA lookup */
-       ctrl = IXGBE_READ_REG(hw, IXGBE_LSECTXCTRL);
-       ctrl &= ~IXGBE_LSECTXCTRL_EN_MASK;
-       ctrl |= IXGBE_LSECTXCTRL_DISABLE;
-       IXGBE_WRITE_REG(hw, IXGBE_LSECTXCTRL, ctrl);
-
-       ctrl = IXGBE_READ_REG(hw, IXGBE_LSECRXCTRL);
-       ctrl &= ~IXGBE_LSECRXCTRL_EN_MASK;
-       ctrl |= IXGBE_LSECRXCTRL_DISABLE << IXGBE_LSECRXCTRL_EN_SHIFT;
-       IXGBE_WRITE_REG(hw, IXGBE_LSECRXCTRL, ctrl);
-
-       /* Start the data paths */
-       ixgbe_enable_sec_rx_path(hw);
-       /**
-        * Workaround:
-        * As no ixgbe_enable_sec_rx_path equivalent is
-        * implemented for tx in the base code, and we are
-        * not allowed to modify the base code in DPDK, so
-        * just call the hand-written one directly for now.
-        */
-       ixgbe_enable_sec_tx_path_generic(hw);
+       ixgbe_dev_macsec_register_disable(dev);
 
        return 0;
 }
@@ -840,14 +736,14 @@ rte_pmd_ixgbe_set_tc_bw_alloc(uint16_t port,
        bw_conf = IXGBE_DEV_PRIVATE_TO_BW_CONF(dev->data->dev_private);
        eth_conf = &dev->data->dev_conf;
 
-       if (eth_conf->txmode.mq_mode == ETH_MQ_TX_DCB) {
+       if (eth_conf->txmode.mq_mode == RTE_ETH_MQ_TX_DCB) {
                nb_tcs = eth_conf->tx_adv_conf.dcb_tx_conf.nb_tcs;
-       } else if (eth_conf->txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB) {
+       } else if (eth_conf->txmode.mq_mode == RTE_ETH_MQ_TX_VMDQ_DCB) {
                if (eth_conf->tx_adv_conf.vmdq_dcb_tx_conf.nb_queue_pools ==
-                   ETH_32_POOLS)
-                       nb_tcs = ETH_4_TCS;
+                   RTE_ETH_32_POOLS)
+                       nb_tcs = RTE_ETH_4_TCS;
                else
-                       nb_tcs = ETH_8_TCS;
+                       nb_tcs = RTE_ETH_8_TCS;
        } else {
                nb_tcs = 1;
        }
@@ -1243,3 +1139,36 @@ rte_pmd_ixgbe_mdio_unlocked_write(uint16_t port, uint32_t reg_addr,
        }
        return 0;
 }
+
+int
+rte_pmd_ixgbe_get_fdir_info(uint16_t port, struct rte_eth_fdir_info *fdir_info)
+{
+       struct rte_eth_dev *dev;
+
+       RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+       dev = &rte_eth_devices[port];
+       if (!is_ixgbe_supported(dev))
+               return -ENOTSUP;
+
+       ixgbe_fdir_info_get(dev, fdir_info);
+
+       return 0;
+}
+
+int
+rte_pmd_ixgbe_get_fdir_stats(uint16_t port,
+                            struct rte_eth_fdir_stats *fdir_stats)
+{
+       struct rte_eth_dev *dev;
+
+       RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
+
+       dev = &rte_eth_devices[port];
+       if (!is_ixgbe_supported(dev))
+               return -ENOTSUP;
+
+       ixgbe_fdir_stats_get(dev, fdir_stats);
+
+       return 0;
+}