net/mlx5: set representor to first PF in bonding mode

[dpdk.git] / drivers / net / mlx5 / linux / mlx5_os.c

diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 5856981..4b7fff4 100644 (file)
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -321,7 +321,6 @@ mlx5_alloc_shared_dr(struct mlx5_priv *priv)
                err = errno;
                goto error;
        }
-       pthread_mutex_init(&sh->dv_mutex, NULL);
        sh->tx_domain = domain;
 #ifdef HAVE_MLX5DV_DR_ESWITCH
        if (priv->config.dv_esw_en) {
@@ -435,7 +434,6 @@ mlx5_os_free_shared_dr(struct mlx5_priv *priv)
                mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
                sh->pop_vlan_action = NULL;
        }
-       pthread_mutex_destroy(&sh->dv_mutex);
 #endif /* HAVE_MLX5DV_DR */
        if (sh->default_miss_action)
                mlx5_glue->destroy_flow_action
@@ -759,7 +757,13 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
                        rte_errno = ENOMEM;
                        return NULL;
                }
-               eth_dev->device = dpdk_dev;
+               priv = eth_dev->data->dev_private;
+               if (priv->sh->bond_dev != UINT16_MAX)
+                       /* For bonding port, use primary PCI device. */
+                       eth_dev->device =
+                               rte_eth_devices[priv->sh->bond_dev].device;
+               else
+                       eth_dev->device = dpdk_dev;
                eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
                eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
                eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
@@ -1131,11 +1135,27 @@ err_secondary:
                        err = -err;
                        goto error;
                }
+#ifdef HAVE_MLX5DV_DR_ACTION_FLOW_HIT
+               if (config->hca_attr.flow_hit_aso) {
+                       sh->flow_hit_aso_en = 1;
+                       err = mlx5_flow_aso_age_mng_init(sh);
+                       if (err) {
+                               err = -err;
+                               goto error;
+                       }
+                       DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
+               }
+#endif /* HAVE_MLX5DV_DR_ACTION_FLOW_HIT */
                /* Check relax ordering support. */
-               if (config->hca_attr.relaxed_ordering_write &&
-                   config->hca_attr.relaxed_ordering_read  &&
-                   !haswell_broadwell_cpu)
-                       sh->cmng.relaxed_ordering = 1;
+               if (!haswell_broadwell_cpu) {
+                       sh->cmng.relaxed_ordering_write =
+                               config->hca_attr.relaxed_ordering_write;
+                       sh->cmng.relaxed_ordering_read =
+                               config->hca_attr.relaxed_ordering_read;
+               } else {
+                       sh->cmng.relaxed_ordering_read = 0;
+                       sh->cmng.relaxed_ordering_write = 0;
+               }
                /* Check for LRO support. */
                if (config->dest_tir && config->hca_attr.lro_cap &&
                    config->dv_flow_en) {
@@ -1359,7 +1379,17 @@ err_secondary:
        eth_dev->data->dev_private = priv;
        priv->dev_data = eth_dev->data;
        eth_dev->data->mac_addrs = priv->mac;
-       eth_dev->device = dpdk_dev;
+       if (spawn->pf_bond < 0) {
+               eth_dev->device = dpdk_dev;
+       } else {
+               /* Use primary bond PCI as device. */
+               if (sh->bond_dev == UINT16_MAX) {
+                       sh->bond_dev = eth_dev->data->port_id;
+                       eth_dev->device = dpdk_dev;
+               } else {
+                       eth_dev->device = rte_eth_devices[sh->bond_dev].device;
+               }
+       }
        eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
        /* Configure the first MAC address by default. */
        if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
@@ -1534,7 +1564,10 @@ err_secondary:
                }
                priv->mreg_cp_tbl->ctx = eth_dev;
        }
+       rte_spinlock_init(&priv->shared_act_sl);
        mlx5_flow_counter_mode_config(eth_dev);
+       if (priv->config.dv_flow_en)
+               eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
        return eth_dev;
 error:
        if (priv) {
@@ -1925,6 +1958,7 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                                                (list[ns].ifindex,
                                                 &list[ns].info);
                        }
+#ifdef HAVE_MLX5DV_DR_DEVX_PORT
                        if (!ret && bd >= 0) {
                                switch (list[ns].info.name_type) {
                                case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
@@ -1942,6 +1976,7 @@ mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                                }
                                continue;
                        }
+#endif
                        if (!ret && (list[ns].info.representor ^
                                     list[ns].info.master))
                                ns++;