net/mlx5: initialize context list mutex dynamically
[dpdk.git] / drivers / net / mlx5 / mlx5.c
index 31011c3..023ef50 100644 (file)
@@ -21,6 +21,7 @@
 #include <rte_spinlock.h>
 #include <rte_string_fns.h>
 #include <rte_alarm.h>
+#include <rte_cycles.h>
 
 #include <mlx5_glue.h>
 #include <mlx5_devx_cmds.h>
@@ -37,6 +38,7 @@
 #include "mlx5_autoconf.h"
 #include "mlx5_mr.h"
 #include "mlx5_flow.h"
+#include "mlx5_flow_os.h"
 #include "rte_pmd_mlx5.h"
 
 /* Device parameter to enable RX completion queue compression. */
@@ -182,10 +184,9 @@ int mlx5_logtype;
 
 static LIST_HEAD(, mlx5_dev_ctx_shared) mlx5_dev_ctx_list =
                                                LIST_HEAD_INITIALIZER();
-static pthread_mutex_t mlx5_dev_ctx_list_mutex = PTHREAD_MUTEX_INITIALIZER;
-
+static pthread_mutex_t mlx5_dev_ctx_list_mutex;
 static const struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = {
-#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
        [MLX5_IPOOL_DECAP_ENCAP] = {
                .size = sizeof(struct mlx5_flow_dv_encap_decap_resource),
                .trunk_size = 64,
@@ -265,6 +266,7 @@ static const struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = {
        },
        [MLX5_IPOOL_TUNNEL_ID] = {
                .size = sizeof(struct mlx5_flow_tunnel),
+               .trunk_size = MLX5_MAX_TUNNELS,
                .need_lock = 1,
                .release_mem_en = 1,
                .type = "mlx5_tunnel_offload",
@@ -413,13 +415,13 @@ mlx5_flow_aso_age_mng_close(struct mlx5_dev_ctx_shared *sh)
                        for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j)
                                if (pool->actions[j].dr_action)
                                        claim_zero
-                                               (mlx5_glue->destroy_flow_action
-                                                 (pool->actions[j].dr_action));
+                                           (mlx5_flow_os_destroy_flow_action
+                                             (pool->actions[j].dr_action));
                        mlx5_free(pool);
                }
                mlx5_free(sh->aso_age_mng->pools);
        }
-       memset(&sh->aso_age_mng, 0, sizeof(sh->aso_age_mng));
+       mlx5_free(sh->aso_age_mng);
 }
 
 /**
@@ -480,7 +482,7 @@ mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 
        LIST_REMOVE(mng, next);
        claim_zero(mlx5_devx_cmd_destroy(mng->dm));
-       claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
+       claim_zero(mlx5_os_umem_dereg(mng->umem));
        mlx5_free(mem);
 }
 
@@ -521,7 +523,7 @@ mlx5_flow_counters_mng_close(struct mlx5_dev_ctx_shared *sh)
 
                                if (cnt->action)
                                        claim_zero
-                                        (mlx5_glue->destroy_flow_action
+                                        (mlx5_flow_os_destroy_flow_action
                                          (cnt->action));
                                if (fallback && MLX5_POOL_GET_CNT
                                    (pool, j)->dcs_when_free)
@@ -915,6 +917,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
                goto error;
        }
        sh->refcnt = 1;
+       sh->bond_dev = UINT16_MAX;
        sh->max_port = spawn->max_port;
        strncpy(sh->ibdev_name, mlx5_os_get_ctx_device_name(sh->ctx),
                sizeof(sh->ibdev_name) - 1);
@@ -929,7 +932,7 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
                sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
                sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
        }
-       sh->pd = mlx5_glue->alloc_pd(sh->ctx);
+       sh->pd = mlx5_os_alloc_pd(sh->ctx);
        if (sh->pd == NULL) {
                DRV_LOG(ERR, "PD allocation failure");
                err = ENOMEM;
@@ -1029,7 +1032,7 @@ error:
        if (sh->tx_uar)
                mlx5_glue->devx_free_uar(sh->tx_uar);
        if (sh->pd)
-               claim_zero(mlx5_glue->dealloc_pd(sh->pd));
+               claim_zero(mlx5_os_dealloc_pd(sh->pd));
        if (sh->ctx)
                claim_zero(mlx5_glue->close_device(sh->ctx));
        mlx5_free(sh);
@@ -1097,7 +1100,7 @@ mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh)
                sh->tx_uar = NULL;
        }
        if (sh->pd)
-               claim_zero(mlx5_glue->dealloc_pd(sh->pd));
+               claim_zero(mlx5_os_dealloc_pd(sh->pd));
        if (sh->tis)
                claim_zero(mlx5_devx_cmd_destroy(sh->tis));
        if (sh->td)
@@ -1144,14 +1147,15 @@ mlx5_alloc_table_hash_list(struct mlx5_priv *priv __rte_unused)
 {
        int err = 0;
        /* Tables are only used in DV and DR modes. */
-#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
        struct mlx5_dev_ctx_shared *sh = priv->sh;
        char s[MLX5_HLIST_NAMESIZE];
 
        MLX5_ASSERT(sh);
        snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
        sh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE,
-                                         0, 0, flow_dv_tbl_create_cb, NULL,
+                                         0, 0, flow_dv_tbl_create_cb,
+                                         flow_dv_tbl_match_cb,
                                          flow_dv_tbl_remove_cb);
        if (!sh->flow_tbls) {
                DRV_LOG(ERR, "flow tables with hash creation failed.");
@@ -1327,7 +1331,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
        mlx5_flex_parser_ecpri_release(dev);
        if (priv->rxqs != NULL) {
                /* XXX race condition if mlx5_rx_burst() is still running. */
-               usleep(1000);
+               rte_delay_us_sleep(1000);
                for (i = 0; (i != priv->rxqs_n); ++i)
                        mlx5_rxq_release(dev, i);
                priv->rxqs_n = 0;
@@ -1335,7 +1339,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
        }
        if (priv->txqs != NULL) {
                /* XXX race condition if mlx5_tx_burst() is still running. */
-               usleep(1000);
+               rte_delay_us_sleep(1000);
                for (i = 0; (i != priv->txqs_n); ++i)
                        mlx5_txq_release(dev, i);
                priv->txqs_n = 0;
@@ -1425,6 +1429,156 @@ mlx5_dev_close(struct rte_eth_dev *dev)
        return 0;
 }
 
+const struct eth_dev_ops mlx5_dev_ops = {
+       .dev_configure = mlx5_dev_configure,
+       .dev_start = mlx5_dev_start,
+       .dev_stop = mlx5_dev_stop,
+       .dev_set_link_down = mlx5_set_link_down,
+       .dev_set_link_up = mlx5_set_link_up,
+       .dev_close = mlx5_dev_close,
+       .promiscuous_enable = mlx5_promiscuous_enable,
+       .promiscuous_disable = mlx5_promiscuous_disable,
+       .allmulticast_enable = mlx5_allmulticast_enable,
+       .allmulticast_disable = mlx5_allmulticast_disable,
+       .link_update = mlx5_link_update,
+       .stats_get = mlx5_stats_get,
+       .stats_reset = mlx5_stats_reset,
+       .xstats_get = mlx5_xstats_get,
+       .xstats_reset = mlx5_xstats_reset,
+       .xstats_get_names = mlx5_xstats_get_names,
+       .fw_version_get = mlx5_fw_version_get,
+       .dev_infos_get = mlx5_dev_infos_get,
+       .read_clock = mlx5_txpp_read_clock,
+       .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
+       .vlan_filter_set = mlx5_vlan_filter_set,
+       .rx_queue_setup = mlx5_rx_queue_setup,
+       .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
+       .tx_queue_setup = mlx5_tx_queue_setup,
+       .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
+       .rx_queue_release = mlx5_rx_queue_release,
+       .tx_queue_release = mlx5_tx_queue_release,
+       .rx_queue_start = mlx5_rx_queue_start,
+       .rx_queue_stop = mlx5_rx_queue_stop,
+       .tx_queue_start = mlx5_tx_queue_start,
+       .tx_queue_stop = mlx5_tx_queue_stop,
+       .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
+       .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
+       .mac_addr_remove = mlx5_mac_addr_remove,
+       .mac_addr_add = mlx5_mac_addr_add,
+       .mac_addr_set = mlx5_mac_addr_set,
+       .set_mc_addr_list = mlx5_set_mc_addr_list,
+       .mtu_set = mlx5_dev_set_mtu,
+       .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
+       .vlan_offload_set = mlx5_vlan_offload_set,
+       .reta_update = mlx5_dev_rss_reta_update,
+       .reta_query = mlx5_dev_rss_reta_query,
+       .rss_hash_update = mlx5_rss_hash_update,
+       .rss_hash_conf_get = mlx5_rss_hash_conf_get,
+       .filter_ctrl = mlx5_dev_filter_ctrl,
+       .rxq_info_get = mlx5_rxq_info_get,
+       .txq_info_get = mlx5_txq_info_get,
+       .rx_burst_mode_get = mlx5_rx_burst_mode_get,
+       .tx_burst_mode_get = mlx5_tx_burst_mode_get,
+       .rx_queue_intr_enable = mlx5_rx_intr_enable,
+       .rx_queue_intr_disable = mlx5_rx_intr_disable,
+       .is_removed = mlx5_is_removed,
+       .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
+       .get_module_info = mlx5_get_module_info,
+       .get_module_eeprom = mlx5_get_module_eeprom,
+       .hairpin_cap_get = mlx5_hairpin_cap_get,
+       .mtr_ops_get = mlx5_flow_meter_ops_get,
+       .hairpin_bind = mlx5_hairpin_bind,
+       .hairpin_unbind = mlx5_hairpin_unbind,
+       .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
+       .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
+       .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
+       .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
+};
+
+/* Available operations from secondary process. */
+const struct eth_dev_ops mlx5_dev_sec_ops = {
+       .stats_get = mlx5_stats_get,
+       .stats_reset = mlx5_stats_reset,
+       .xstats_get = mlx5_xstats_get,
+       .xstats_reset = mlx5_xstats_reset,
+       .xstats_get_names = mlx5_xstats_get_names,
+       .fw_version_get = mlx5_fw_version_get,
+       .dev_infos_get = mlx5_dev_infos_get,
+       .read_clock = mlx5_txpp_read_clock,
+       .rx_queue_start = mlx5_rx_queue_start,
+       .rx_queue_stop = mlx5_rx_queue_stop,
+       .tx_queue_start = mlx5_tx_queue_start,
+       .tx_queue_stop = mlx5_tx_queue_stop,
+       .rxq_info_get = mlx5_rxq_info_get,
+       .txq_info_get = mlx5_txq_info_get,
+       .rx_burst_mode_get = mlx5_rx_burst_mode_get,
+       .tx_burst_mode_get = mlx5_tx_burst_mode_get,
+       .get_module_info = mlx5_get_module_info,
+       .get_module_eeprom = mlx5_get_module_eeprom,
+};
+
+/* Available operations in flow isolated mode. */
+const struct eth_dev_ops mlx5_dev_ops_isolate = {
+       .dev_configure = mlx5_dev_configure,
+       .dev_start = mlx5_dev_start,
+       .dev_stop = mlx5_dev_stop,
+       .dev_set_link_down = mlx5_set_link_down,
+       .dev_set_link_up = mlx5_set_link_up,
+       .dev_close = mlx5_dev_close,
+       .promiscuous_enable = mlx5_promiscuous_enable,
+       .promiscuous_disable = mlx5_promiscuous_disable,
+       .allmulticast_enable = mlx5_allmulticast_enable,
+       .allmulticast_disable = mlx5_allmulticast_disable,
+       .link_update = mlx5_link_update,
+       .stats_get = mlx5_stats_get,
+       .stats_reset = mlx5_stats_reset,
+       .xstats_get = mlx5_xstats_get,
+       .xstats_reset = mlx5_xstats_reset,
+       .xstats_get_names = mlx5_xstats_get_names,
+       .fw_version_get = mlx5_fw_version_get,
+       .dev_infos_get = mlx5_dev_infos_get,
+       .read_clock = mlx5_txpp_read_clock,
+       .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
+       .vlan_filter_set = mlx5_vlan_filter_set,
+       .rx_queue_setup = mlx5_rx_queue_setup,
+       .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
+       .tx_queue_setup = mlx5_tx_queue_setup,
+       .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
+       .rx_queue_release = mlx5_rx_queue_release,
+       .tx_queue_release = mlx5_tx_queue_release,
+       .rx_queue_start = mlx5_rx_queue_start,
+       .rx_queue_stop = mlx5_rx_queue_stop,
+       .tx_queue_start = mlx5_tx_queue_start,
+       .tx_queue_stop = mlx5_tx_queue_stop,
+       .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
+       .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
+       .mac_addr_remove = mlx5_mac_addr_remove,
+       .mac_addr_add = mlx5_mac_addr_add,
+       .mac_addr_set = mlx5_mac_addr_set,
+       .set_mc_addr_list = mlx5_set_mc_addr_list,
+       .mtu_set = mlx5_dev_set_mtu,
+       .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
+       .vlan_offload_set = mlx5_vlan_offload_set,
+       .filter_ctrl = mlx5_dev_filter_ctrl,
+       .rxq_info_get = mlx5_rxq_info_get,
+       .txq_info_get = mlx5_txq_info_get,
+       .rx_burst_mode_get = mlx5_rx_burst_mode_get,
+       .tx_burst_mode_get = mlx5_tx_burst_mode_get,
+       .rx_queue_intr_enable = mlx5_rx_intr_enable,
+       .rx_queue_intr_disable = mlx5_rx_intr_disable,
+       .is_removed = mlx5_is_removed,
+       .get_module_info = mlx5_get_module_info,
+       .get_module_eeprom = mlx5_get_module_eeprom,
+       .hairpin_cap_get = mlx5_hairpin_cap_get,
+       .mtr_ops_get = mlx5_flow_meter_ops_get,
+       .hairpin_bind = mlx5_hairpin_bind,
+       .hairpin_unbind = mlx5_hairpin_unbind,
+       .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
+       .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
+       .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
+       .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
+};
+
 /**
  * Verify and store value for device argument.
  *
@@ -2034,7 +2188,7 @@ static const struct rte_pci_id mlx5_pci_id_map[] = {
        },
        {
                RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
-                               PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
+                               PCI_DEVICE_ID_MELLANOX_CONNECTXVF)
        },
        {
                RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
@@ -2080,6 +2234,7 @@ RTE_LOG_REGISTER(mlx5_logtype, pmd.net.mlx5, NOTICE)
  */
 RTE_INIT(rte_mlx5_pmd_init)
 {
+       pthread_mutex_init(&mlx5_dev_ctx_list_mutex, NULL);
        mlx5_common_init();
        /* Build the static tables for Verbs conversion. */
        mlx5_set_ptype_table();