net/mlx5: fix flow application order on stop/start

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index d39b199..1148dee 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -89,6 +89,14 @@ enum {
        PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF = 0x101a,
 };
 
+struct mlx5_xstats_ctrl {
+       /* Number of device stats. */
+       uint16_t stats_n;
+       /* Index in the device counters table. */
+       uint16_t dev_table_idx[MLX5_MAX_XSTATS];
+       uint64_t base[MLX5_MAX_XSTATS];
+};
+
 struct priv {
        struct rte_eth_dev *dev; /* Ethernet device. */
        struct ibv_context *ctx; /* Verbs context. */
@@ -115,11 +123,17 @@ struct priv {
        unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */
        unsigned int hw_padding:1; /* End alignment padding is supported. */
        unsigned int sriov:1; /* This is a VF or PF with VF devices. */
-       unsigned int mps:1; /* Whether multi-packet send is supported. */
+       unsigned int mps:2; /* Multi-packet send mode (0: disabled). */
+       unsigned int mpw_hdr_dseg:1; /* Enable DSEGs in the title WQEBB. */
        unsigned int cqe_comp:1; /* Whether CQE compression is enabled. */
        unsigned int pending_alarm:1; /* An alarm is pending. */
+       unsigned int tso:1; /* Whether TSO is supported. */
+       unsigned int tunnel_en:1;
+       /* Whether Tx offloads for tunneled packets are supported. */
+       unsigned int max_tso_payload_sz; /* Maximum TCP payload for TSO. */
        unsigned int txq_inline; /* Maximum packet size for inlining. */
        unsigned int txqs_inline; /* Queue number threshold for inlining. */
+       unsigned int inline_max_packet_sz; /* Max packet size for inlining. */
        /* RX/TX queues. */
        unsigned int rxqs_n; /* RX queues array size. */
        unsigned int txqs_n; /* TX queues array size. */
@@ -140,8 +154,10 @@ struct priv {
        unsigned int reta_idx_n; /* RETA index size. */
        struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */
        struct fdir_queue *fdir_drop_queue; /* Flow director drop queue. */
-       LIST_HEAD(mlx5_flows, rte_flow) flows; /* RTE Flow rules. */
+       struct rte_flow_drop *flow_drop_queue; /* Flow drop queue. */
+       TAILQ_HEAD(mlx5_flows, rte_flow) flows; /* RTE Flow rules. */
        uint32_t link_speed_capa; /* Link speed capabilities. */
+       struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
        rte_spinlock_t lock; /* Lock for control functions. */
 };
 
@@ -188,6 +204,8 @@ struct priv *mlx5_get_priv(struct rte_eth_dev *dev);
 int mlx5_is_secondary(void);
 int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]);
 int priv_ifreq(const struct priv *, int req, struct ifreq *);
+int priv_is_ib_cntr(const char *);
+int priv_get_cntr_sysfs(struct priv *, const char *, uint64_t *);
 int priv_get_num_vfs(struct priv *, uint16_t *);
 int priv_get_mtu(struct priv *, uint16_t *);
 int priv_set_flags(struct priv *, unsigned int, unsigned int);
@@ -201,7 +219,7 @@ int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
 int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,
                                struct rte_pci_addr *);
 void mlx5_dev_link_status_handler(void *);
-void mlx5_dev_interrupt_handler(struct rte_intr_handle *, void *);
+void mlx5_dev_interrupt_handler(void *);
 void priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
 void priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
 int mlx5_set_link_down(struct rte_eth_dev *dev);
@@ -220,8 +238,8 @@ int hash_rxq_mac_addrs_add(struct hash_rxq *);
 int priv_mac_addr_add(struct priv *, unsigned int,
                      const uint8_t (*)[ETHER_ADDR_LEN]);
 int priv_mac_addrs_enable(struct priv *);
-void mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t,
-                      uint32_t);
+int mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t,
+                     uint32_t);
 void mlx5_mac_addr_set(struct rte_eth_dev *, struct ether_addr *);
 
 /* mlx5_rss.c */
@@ -249,8 +267,14 @@ void mlx5_allmulticast_disable(struct rte_eth_dev *);
 
 /* mlx5_stats.c */
 
+void priv_xstats_init(struct priv *);
 void mlx5_stats_get(struct rte_eth_dev *, struct rte_eth_stats *);
 void mlx5_stats_reset(struct rte_eth_dev *);
+int mlx5_xstats_get(struct rte_eth_dev *,
+                   struct rte_eth_xstat *, unsigned int);
+void mlx5_xstats_reset(struct rte_eth_dev *);
+int mlx5_xstats_get_names(struct rte_eth_dev *,
+                         struct rte_eth_xstat_name *, unsigned int);
 
 /* mlx5_vlan.c */
 
@@ -289,5 +313,6 @@ int mlx5_flow_destroy(struct rte_eth_dev *, struct rte_flow *,
 int mlx5_flow_flush(struct rte_eth_dev *, struct rte_flow_error *);
 int priv_flow_start(struct priv *);
 void priv_flow_stop(struct priv *);
+int priv_flow_rxq_in_use(struct priv *, struct rxq *);
 
 #endif /* RTE_PMD_MLX5_H_ */