net/mlx5: support reading device clock

[dpdk.git] / drivers / net / mlx5 / mlx5.h

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index d01d7f3..15e35e8 100644 (file)
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -531,6 +531,64 @@ struct mlx5_flow_id_pool {
        uint32_t max_id; /**< Maximum id can be allocated from the pool. */
 };
 
+/* Tx pacing queue structure - for Clock and Rearm queues. */
+struct mlx5_txpp_wq {
+       /* Completion Queue related data.*/
+       struct mlx5_devx_obj *cq;
+       struct mlx5dv_devx_umem *cq_umem;
+       union {
+               volatile void *cq_buf;
+               volatile struct mlx5_cqe *cqes;
+       };
+       volatile uint32_t *cq_dbrec;
+       uint32_t cq_ci:24;
+       uint32_t arm_sn:2;
+       /* Send Queue related data.*/
+       struct mlx5_devx_obj *sq;
+       struct mlx5dv_devx_umem *sq_umem;
+       union {
+               volatile void *sq_buf;
+               volatile struct mlx5_wqe *wqes;
+       };
+       uint16_t sq_size; /* Number of WQEs in the queue. */
+       uint16_t sq_ci; /* Next WQE to execute. */
+       volatile uint32_t *sq_dbrec;
+};
+
+/* Tx packet pacing internal timestamp. */
+struct mlx5_txpp_ts {
+       rte_atomic64_t ci_ts;
+       rte_atomic64_t ts;
+};
+
+/* Tx packet pacing structure. */
+struct mlx5_dev_txpp {
+       pthread_mutex_t mutex; /* Pacing create/destroy mutex. */
+       uint32_t refcnt; /* Pacing reference counter. */
+       uint32_t freq; /* Timestamp frequency, Hz. */
+       uint32_t tick; /* Completion tick duration in nanoseconds. */
+       uint32_t test; /* Packet pacing test mode. */
+       int32_t skew; /* Scheduling skew. */
+       uint32_t eqn; /* Event Queue number. */
+       struct rte_intr_handle intr_handle; /* Periodic interrupt. */
+       struct mlx5dv_devx_event_channel *echan; /* Event Channel. */
+       struct mlx5_txpp_wq clock_queue; /* Clock Queue. */
+       struct mlx5_txpp_wq rearm_queue; /* Clock Queue. */
+       struct mlx5dv_pp *pp; /* Packet pacing context. */
+       uint16_t pp_id; /* Packet pacing context index. */
+       uint16_t ts_n; /* Number of captured timestamps. */
+       uint16_t ts_p; /* Pointer to statisticks timestamp. */
+       struct mlx5_txpp_ts *tsa; /* Timestamps sliding window stats. */
+       struct mlx5_txpp_ts ts; /* Cached completion id/timestamp. */
+       uint32_t sync_lost:1; /* ci/timestamp synchronization lost. */
+       /* Statistics counters. */
+       rte_atomic32_t err_miss_int; /* Missed service interrupt. */
+       rte_atomic32_t err_rearm_queue; /* Rearm Queue errors. */
+       rte_atomic32_t err_clock_queue; /* Clock Queue errors. */
+       rte_atomic32_t err_ts_past; /* Timestamp in the past. */
+       rte_atomic32_t err_ts_future; /* Timestamp in the distant future. */
+};
+
 /*
  * Shared Infiniband device context for Master/Representors
  * which belong to same IB device with multiple IB ports.
@@ -547,9 +605,12 @@ struct mlx5_dev_ctx_shared {
        char ibdev_name[DEV_SYSFS_NAME_MAX]; /* SYSFS dev name. */
        char ibdev_path[DEV_SYSFS_PATH_MAX]; /* SYSFS dev path for secondary */
        struct mlx5_dev_attr device_attr; /* Device properties. */
+       int numa_node; /* Numa node of backing physical device. */
        LIST_ENTRY(mlx5_dev_ctx_shared) mem_event_cb;
        /**< Called by memory event callback. */
        struct mlx5_mr_share_cache share_cache;
+       /* Packet pacing related structure. */
+       struct mlx5_dev_txpp txpp;
        /* Shared DV/DR flow data section. */
        pthread_mutex_t dv_mutex; /* DV context mutex. */
        uint32_t dv_meta_mask; /* flow META metadata supported mask. */
@@ -586,6 +647,7 @@ struct mlx5_dev_ctx_shared {
        struct mlx5_devx_obj *tis; /* TIS object. */
        struct mlx5_devx_obj *td; /* Transport domain. */
        struct mlx5_flow_id_pool *flow_id_pool; /* Flow ID pool. */
+       struct mlx5dv_devx_uar *tx_uar; /* Tx/packer pacing shared UAR. */
        struct mlx5_dev_shared_port port[]; /* per device port data array. */
 };
 
@@ -621,6 +683,7 @@ struct mlx5_priv {
        unsigned int representor:1; /* Device is a port representor. */
        unsigned int master:1; /* Device is a E-Switch master. */
        unsigned int dr_shared:1; /* DV/DR data is shared. */
+       unsigned int txpp_en:1; /* Tx packet pacing enabled. */
        unsigned int counter_fallback:1; /* Use counter fallback management. */
        unsigned int mtr_en:1; /* Whether support meter. */
        unsigned int mtr_reg_share:1; /* Whether support meter REG_C share. */
@@ -943,4 +1006,11 @@ int mlx5_os_get_stats_n(struct rte_eth_dev *dev);
 void mlx5_os_stats_init(struct rte_eth_dev *dev);
 void mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
                           mlx5_dereg_mr_t *dereg_mr_cb);
+/* mlx5_txpp.c */
+
+int mlx5_txpp_start(struct rte_eth_dev *dev);
+void mlx5_txpp_stop(struct rte_eth_dev *dev);
+int mlx5_txpp_read_clock(struct rte_eth_dev *dev, uint64_t *timestamp);
+void mlx5_txpp_interrupt_handler(void *cb_arg);
+
 #endif /* RTE_PMD_MLX5_H_ */