#include <stdlib.h>
#include <errno.h>
-#include <rte_atomic.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_bus_pci.h>
#include <rte_mbuf.h>
#include <rte_common.h>
#include <rte_rwlock.h>
#include <rte_cycles.h>
+#include <mlx5_malloc.h>
+
#include "mlx5_rxtx.h"
#include "mlx5_autoconf.h"
MLX5_ASSERT(priv);
MLX5_ASSERT(priv->if_index);
- ifindex = priv->if_index;
+ ifindex = priv->bond_ifindex > 0 ? priv->bond_ifindex : priv->if_index;
if (!ifindex)
rte_errno = ENXIO;
return ifindex;
return -rte_errno;
}
priv->rss_conf.rss_key =
- rte_realloc(priv->rss_conf.rss_key,
- MLX5_RSS_HASH_KEY_LEN, 0);
+ mlx5_realloc(priv->rss_conf.rss_key, MLX5_MEM_RTE,
+ MLX5_RSS_HASH_KEY_LEN, 0, SOCKET_ID_ANY);
if (!priv->rss_conf.rss_key) {
DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
dev->data->port_id, rxqs_n);
return -rte_errno;
}
- if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
- dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
-
+ if ((dev->data->dev_conf.txmode.offloads &
+ DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP) &&
+ rte_mbuf_dyn_tx_timestamp_register(NULL, NULL) != 0) {
+ DRV_LOG(ERR, "port %u cannot register Tx timestamp field/flag",
+ dev->data->port_id);
+ return -rte_errno;
+ }
memcpy(priv->rss_conf.rss_key,
use_app_rss_key ?
dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
if (priv->skip_default_rss_reta)
return ret;
- rss_queue_arr = rte_malloc("", rxqs_n * sizeof(unsigned int), 0);
+ rss_queue_arr = mlx5_malloc(0, rxqs_n * sizeof(unsigned int), 0,
+ SOCKET_ID_ANY);
if (!rss_queue_arr) {
DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)",
dev->data->port_id, rxqs_n);
DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
dev->data->port_id, rss_queue_n);
rte_errno = EINVAL;
- rte_free(rss_queue_arr);
+ mlx5_free(rss_queue_arr);
return -rte_errno;
}
DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
rss_queue_n));
ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
if (ret) {
- rte_free(rss_queue_arr);
+ mlx5_free(rss_queue_arr);
return ret;
}
/*
if (++j == rss_queue_n)
j = 0;
}
- rte_free(rss_queue_arr);
+ mlx5_free(rss_queue_arr);
return ret;
}
info->max_tx_queues = max;
info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
+ info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
+ info->rx_seg_capa.multi_pools = !config->mprq.enabled;
+ info->rx_seg_capa.offset_allowed = !config->mprq.enabled;
+ info->rx_seg_capa.offset_align_log2 = 0;
info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
info->rx_queue_offload_capa);
info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
* representors (more than 4K) or PFs (more than 15)
* this approach must be reconsidered.
*/
- if ((info->switch_info.port_id >>
- MLX5_PORT_ID_BONDING_PF_SHIFT) ||
+ /* Switch port ID for VF representors: 0 - 0xFFE */
+ if ((info->switch_info.port_id != 0xffff &&
+ info->switch_info.port_id >=
+ ((1 << MLX5_PORT_ID_BONDING_PF_SHIFT) - 1)) ||
priv->pf_bond > MLX5_PORT_ID_BONDING_PF_MASK) {
DRV_LOG(ERR, "can't update switch port ID"
" for bonding device");
MLX5_ASSERT(false);
return -ENODEV;
}
+ /*
+ * Switch port ID for Host PF representor
+ * (representor_id is -1) , set to 0xFFF
+ */
+ if (info->switch_info.port_id == 0xffff)
+ info->switch_info.port_id = 0xfff;
info->switch_info.port_id |=
priv->pf_bond << MLX5_PORT_ID_BONDING_PF_SHIFT;
}
return 0;
}
+/**
+ * Calculate representor ID from port switch info.
+ *
+ * Uint16 representor ID bits definition:
+ * pf: 2
+ * type: 2
+ * vf/sf: 12
+ *
+ * @param info
+ * Port switch info.
+ *
+ * @return
+ * Encoded representor ID.
+ */
+uint16_t
+mlx5_representor_id_encode(const struct mlx5_switch_info *info)
+{
+ enum rte_eth_representor_type type = RTE_ETH_REPRESENTOR_VF;
+ uint16_t repr = info->port_name;
+
+ if (info->representor == 0)
+ return UINT16_MAX;
+ if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFSF)
+ type = RTE_ETH_REPRESENTOR_SF;
+ if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF)
+ repr = UINT16_MAX;
+ return MLX5_REPRESENTOR_ID(info->pf_num, type, repr);
+}
+
+/**
+ * DPDK callback to get information about representor.
+ *
+ * Representor ID bits definition:
+ * vf/sf: 12
+ * type: 2
+ * pf: 2
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ * @param[out] info
+ * Nullable info structure output buffer.
+ *
+ * @return
+ * negative on error, or the number of representor ranges.
+ */
+int
+mlx5_representor_info_get(struct rte_eth_dev *dev,
+ struct rte_eth_representor_info *info)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ int n_type = 3; /* Number of representor types, VF, HPF and SF. */
+ int n_pf = 2; /* Number of PFs. */
+ int i = 0, pf;
+
+ if (info == NULL)
+ goto out;
+ info->controller = 0;
+ info->pf = priv->pf_bond >= 0 ? priv->pf_bond : 0;
+ for (pf = 0; pf < n_pf; ++pf) {
+ /* VF range. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = 0;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dvf", pf);
+ i++;
+ /* HPF range. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = UINT16_MAX;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dvf", pf);
+ i++;
+ /* SF range. */
+ info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
+ info->ranges[i].controller = 0;
+ info->ranges[i].pf = pf;
+ info->ranges[i].vf = 0;
+ info->ranges[i].id_base =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
+ info->ranges[i].id_end =
+ MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
+ snprintf(info->ranges[i].name,
+ sizeof(info->ranges[i].name), "pf%dsf", pf);
+ i++;
+ }
+out:
+ return n_type * n_pf;
+}
+
/**
* Get firmware version of a device.
*
if (dev->rx_pkt_burst == mlx5_rx_burst ||
dev->rx_pkt_burst == mlx5_rx_burst_mprq ||
- dev->rx_pkt_burst == mlx5_rx_burst_vec)
+ dev->rx_pkt_burst == mlx5_rx_burst_vec ||
+ dev->rx_pkt_burst == mlx5_rx_burst_mprq_vec)
return ptypes;
return NULL;
}
MLX5_ASSERT(dev != NULL);
if (mlx5_check_vec_rx_support(dev) > 0) {
- rx_pkt_burst = mlx5_rx_burst_vec;
- DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
- dev->data->port_id);
+ if (mlx5_mprq_enabled(dev)) {
+ rx_pkt_burst = mlx5_rx_burst_mprq_vec;
+ DRV_LOG(DEBUG, "port %u selected vectorized"
+ " MPRQ Rx function", dev->data->port_id);
+ } else {
+ rx_pkt_burst = mlx5_rx_burst_vec;
+ DRV_LOG(DEBUG, "port %u selected vectorized"
+ " SPRQ Rx function", dev->data->port_id);
+ }
} else if (mlx5_mprq_enabled(dev)) {
rx_pkt_burst = mlx5_rx_burst_mprq;
+ DRV_LOG(DEBUG, "port %u selected MPRQ Rx function",
+ dev->data->port_id);
+ } else {
+ DRV_LOG(DEBUG, "port %u selected SPRQ Rx function",
+ dev->data->port_id);
}
return rx_pkt_burst;
}
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
int
-mlx5_hairpin_cap_get(struct rte_eth_dev *dev,
- struct rte_eth_hairpin_cap *cap)
+mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)
{
struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_dev_config *config = &priv->config;
- if (priv->sh->devx == 0) {
+ if (!priv->sh->devx || !config->dest_tir || !config->dv_flow_en) {
rte_errno = ENOTSUP;
return -rte_errno;
}
git.droids-corp.org / dpdk.git / blobdiff