net/mlx5: separate DevX commands interface
[dpdk.git] / drivers / net / mlx5 / mlx5_ethdev.c
index 2278b24..ce0109c 100644 (file)
@@ -38,6 +38,7 @@
 
 #include "mlx5.h"
 #include "mlx5_glue.h"
+#include "mlx5_devx_cmds.h"
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
 
@@ -383,9 +384,6 @@ mlx5_dev_configure(struct rte_eth_dev *dev)
        struct mlx5_priv *priv = dev->data->dev_private;
        unsigned int rxqs_n = dev->data->nb_rx_queues;
        unsigned int txqs_n = dev->data->nb_tx_queues;
-       unsigned int i;
-       unsigned int j;
-       unsigned int reta_idx_n;
        const uint8_t use_app_rss_key =
                !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
        int ret = 0;
@@ -407,6 +405,10 @@ mlx5_dev_configure(struct rte_eth_dev *dev)
                rte_errno = ENOMEM;
                return -rte_errno;
        }
+
+       if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+               dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+
        memcpy(priv->rss_conf.rss_key,
               use_app_rss_key ?
               dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
@@ -431,34 +433,91 @@ mlx5_dev_configure(struct rte_eth_dev *dev)
                DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
                        dev->data->port_id, priv->rxqs_n, rxqs_n);
                priv->rxqs_n = rxqs_n;
-               /*
-                * If the requested number of RX queues is not a power of two,
-                * use the maximum indirection table size for better balancing.
-                * The result is always rounded to the next power of two.
-                */
-               reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
-                                            priv->config.ind_table_max_size :
-                                            rxqs_n));
-               ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
-               if (ret)
-                       return ret;
-               /*
-                * When the number of RX queues is not a power of two,
-                * the remaining table entries are padded with reused WQs
-                * and hashes are not spread uniformly.
-                */
-               for (i = 0, j = 0; (i != reta_idx_n); ++i) {
-                       (*priv->reta_idx)[i] = j;
-                       if (++j == rxqs_n)
-                               j = 0;
-               }
        }
+       priv->skip_default_rss_reta = 0;
        ret = mlx5_proc_priv_init(dev);
        if (ret)
                return ret;
        return 0;
 }
 
+/**
+ * Configure default RSS reta.
+ *
+ * @param dev
+ *   Pointer to Ethernet device structure.
+ *
+ * @return
+ *   0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+int
+mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev)
+{
+       struct mlx5_priv *priv = dev->data->dev_private;
+       unsigned int rxqs_n = dev->data->nb_rx_queues;
+       unsigned int i;
+       unsigned int j;
+       unsigned int reta_idx_n;
+       int ret = 0;
+       unsigned int *rss_queue_arr = NULL;
+       unsigned int rss_queue_n = 0;
+
+       if (priv->skip_default_rss_reta)
+               return ret;
+       rss_queue_arr = rte_malloc("", rxqs_n * sizeof(unsigned int), 0);
+       if (!rss_queue_arr) {
+               DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)",
+                       dev->data->port_id, rxqs_n);
+               rte_errno = ENOMEM;
+               return -rte_errno;
+       }
+       for (i = 0, j = 0; i < rxqs_n; i++) {
+               struct mlx5_rxq_data *rxq_data;
+               struct mlx5_rxq_ctrl *rxq_ctrl;
+
+               rxq_data = (*priv->rxqs)[i];
+               rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
+               if (rxq_ctrl && rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
+                       rss_queue_arr[j++] = i;
+       }
+       rss_queue_n = j;
+       if (rss_queue_n > priv->config.ind_table_max_size) {
+               DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
+                       dev->data->port_id, rss_queue_n);
+               rte_errno = EINVAL;
+               rte_free(rss_queue_arr);
+               return -rte_errno;
+       }
+       DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
+               dev->data->port_id, priv->rxqs_n, rxqs_n);
+       priv->rxqs_n = rxqs_n;
+       /*
+        * If the requested number of RX queues is not a power of two,
+        * use the maximum indirection table size for better balancing.
+        * The result is always rounded to the next power of two.
+        */
+       reta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ?
+                               priv->config.ind_table_max_size :
+                               rss_queue_n));
+       ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
+       if (ret) {
+               rte_free(rss_queue_arr);
+               return ret;
+       }
+       /*
+        * When the number of RX queues is not a power of two,
+        * the remaining table entries are padded with reused WQs
+        * and hashes are not spread uniformly.
+        */
+       for (i = 0, j = 0; (i != reta_idx_n); ++i) {
+               (*priv->reta_idx)[i] = rss_queue_arr[j];
+               if (++j == rss_queue_n)
+                       j = 0;
+       }
+       rte_free(rss_queue_arr);
+       return ret;
+}
+
 /**
  * Sets default tuning parameters.
  *
@@ -475,8 +534,8 @@ mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
        /* Minimum CPU utilization. */
        info->default_rxportconf.ring_size = 256;
        info->default_txportconf.ring_size = 256;
-       info->default_rxportconf.burst_size = 64;
-       info->default_txportconf.burst_size = 64;
+       info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST;
+       info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST;
        if (priv->link_speed_capa & ETH_LINK_SPEED_100G) {
                info->default_rxportconf.nb_queues = 16;
                info->default_txportconf.nb_queues = 16;
@@ -552,6 +611,7 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
        /* FIXME: we should ask the device for these values. */
        info->min_rx_bufsize = 32;
        info->max_rx_pktlen = 65536;
+       info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE;
        /*
         * Since we need one CQ per QP, the limit is the minimum number
         * between the two values.
@@ -1739,6 +1799,10 @@ mlx5_is_removed(struct rte_eth_dev *dev)
  *
  * @param[in] port
  *   Device port id.
+ * @param[in] valid
+ *   Device port id is valid, skip check. This flag is useful
+ *   when trials are performed from probing and device is not
+ *   flagged as valid yet (in attaching process).
  * @param[out] es_domain_id
  *   E-Switch domain id.
  * @param[out] es_port_id
@@ -1749,7 +1813,7 @@ mlx5_is_removed(struct rte_eth_dev *dev)
  *   on success, NULL otherwise and rte_errno is set.
  */
 struct mlx5_priv *
-mlx5_port_to_eswitch_info(uint16_t port)
+mlx5_port_to_eswitch_info(uint16_t port, bool valid)
 {
        struct rte_eth_dev *dev;
        struct mlx5_priv *priv;
@@ -1758,7 +1822,7 @@ mlx5_port_to_eswitch_info(uint16_t port)
                rte_errno = EINVAL;
                return NULL;
        }
-       if (!rte_eth_dev_is_valid_port(port)) {
+       if (!valid && !rte_eth_dev_is_valid_port(port)) {
                rte_errno = ENODEV;
                return NULL;
        }
@@ -2114,3 +2178,30 @@ int mlx5_get_module_eeprom(struct rte_eth_dev *dev,
        rte_free(eeprom);
        return ret;
 }
+
+/**
+ * DPDK callback to retrieve hairpin capabilities.
+ *
+ * @param dev
+ *   Pointer to Ethernet device structure.
+ * @param[out] cap
+ *   Storage for hairpin capability data.
+ *
+ * @return
+ *   0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+int mlx5_hairpin_cap_get(struct rte_eth_dev *dev,
+                        struct rte_eth_hairpin_cap *cap)
+{
+       struct mlx5_priv *priv = dev->data->dev_private;
+
+       if (priv->sh->devx == 0) {
+               rte_errno = ENOTSUP;
+               return -rte_errno;
+       }
+       cap->max_nb_queues = UINT16_MAX;
+       cap->max_rx_2_tx = 1;
+       cap->max_tx_2_rx = 1;
+       cap->max_nb_desc = 8192;
+       return 0;
+}