net/mlx5: fix raw encap/decap limit

[dpdk.git] / drivers / net / mlx5 / mlx5_flow.h

diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index b77df50..1c3c6ab 100644 (file)
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -36,12 +36,14 @@ enum mlx5_rte_flow_action_type {
        MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
        MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
        MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET,
+       MLX5_RTE_FLOW_ACTION_TYPE_AGE,
 };
 
 #define MLX5_SHARED_ACTION_TYPE_OFFSET 30
 
 enum {
        MLX5_SHARED_ACTION_TYPE_RSS,
+       MLX5_SHARED_ACTION_TYPE_AGE,
 };
 
 /* Matches on selected register. */
@@ -343,8 +345,8 @@ enum mlx5_feature_name {
 #define MLX5_GENEVE_OPT_LEN_0 14
 #define MLX5_GENEVE_OPT_LEN_1 63
 
-#define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_flow_item_eth) + \
-                                         sizeof(struct rte_flow_item_ipv4))
+#define MLX5_ENCAPSULATION_DECISION_SIZE (sizeof(struct rte_ether_hdr) + \
+                                         sizeof(struct rte_ipv4_hdr))
 
 /* IPv4 fragment_offset field contains relevant data in bits 2 to 15. */
 #define MLX5_IPV4_FRAG_OFFSET_MASK \
@@ -386,6 +388,7 @@ enum mlx5_flow_fate_type {
        MLX5_FLOW_FATE_PORT_ID,
        MLX5_FLOW_FATE_DROP,
        MLX5_FLOW_FATE_DEFAULT_MISS,
+       MLX5_FLOW_FATE_SHARED_RSS,
        MLX5_FLOW_FATE_MAX,
 };
 
@@ -649,6 +652,8 @@ struct mlx5_flow_handle {
                /**< Generic value indicates the fate action. */
                uint32_t rix_default_fate;
                /**< Indicates default miss fate action. */
+               uint32_t rix_srss;
+               /**< Indicates shared RSS fate action. */
        };
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
        struct mlx5_flow_handle_dv dvh;
@@ -759,6 +764,7 @@ struct mlx5_flow_verbs_workspace {
 #define MLX5_NUM_MAX_DEV_FLOWS 32
 
 /** Device flow structure. */
+__extension__
 struct mlx5_flow {
        struct rte_flow *flow; /**< Pointer to the main flow. */
        uint32_t flow_idx; /**< The memory pool index to the main flow. */
@@ -766,7 +772,9 @@ struct mlx5_flow {
        uint64_t act_flags;
        /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */
        bool external; /**< true if the flow is created external to PMD. */
-       uint8_t ingress; /**< 1 if the flow is ingress. */
+       uint8_t ingress:1; /**< 1 if the flow is ingress. */
+       uint8_t skip_scale:1;
+       /**< 1 if skip the scale the table with factor. */
        union {
 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
                struct mlx5_flow_dv_workspace dv;
@@ -942,8 +950,12 @@ struct mlx5_flow_tunnel {
 
 /** PMD tunnel related context */
 struct mlx5_flow_tunnel_hub {
+       /* Tunnels list
+        * Access to the list MUST be MT protected
+        */
        LIST_HEAD(, mlx5_flow_tunnel) tunnels;
-       rte_spinlock_t sl;                      /* Tunnel list spinlock. */
+        /* protect access to the tunnels list */
+       rte_spinlock_t sl;
        struct mlx5_hlist *groups;              /** non tunnel groups */
 };
 
@@ -983,8 +995,13 @@ mlx5_tunnel_hub(struct rte_eth_dev *dev)
 static inline bool
 is_tunnel_offload_active(struct rte_eth_dev *dev)
 {
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
        struct mlx5_priv *priv = dev->data->dev_private;
        return !!priv->config.dv_miss_info;
+#else
+       RTE_SET_USED(dev);
+       return false;
+#endif
 }
 
 static inline bool
@@ -1022,7 +1039,6 @@ flow_items_to_tunnel(const struct rte_flow_item items[])
 /* Flow structure. */
 struct rte_flow {
        ILIST_ENTRY(uint32_t)next; /**< Index to the next flow structure. */
-       uint32_t shared_rss; /** < Shared RSS action ID. */
        uint32_t dev_handles;
        /**< Device flow handles that are part of the flow. */
        uint32_t drv_type:2; /**< Driver type. */
@@ -1085,11 +1101,23 @@ struct rte_flow_shared_action {
 
 /* Thread specific flow workspace intermediate data. */
 struct mlx5_flow_workspace {
+       /* If creating another flow in same thread, push new as stack. */
+       struct mlx5_flow_workspace *prev;
+       struct mlx5_flow_workspace *next;
+       uint32_t inuse; /* can't create new flow with current. */
        struct mlx5_flow flows[MLX5_NUM_MAX_DEV_FLOWS];
-       struct mlx5_flow_rss_desc rss_desc[2];
-       uint32_t rssq_num[2]; /* Allocated queue num in rss_desc. */
-       int flow_idx; /* Intermediate device flow index. */
-       int flow_nested_idx; /* Intermediate device flow index, nested. */
+       struct mlx5_flow_rss_desc rss_desc;
+       uint32_t rssq_num; /* Allocated queue num in rss_desc. */
+       uint32_t flow_idx; /* Intermediate device flow index. */
+};
+
+struct mlx5_flow_split_info {
+       bool external;
+       /**< True if flow is created by request external to PMD. */
+       uint8_t skip_scale; /**< Skip the scale the table with factor. */
+       uint32_t flow_idx; /**< This memory pool index to the flow. */
+       uint32_t prefix_mark; /**< Prefix subflow mark flag. */
+       uint64_t prefix_layers; /**< Prefix subflow layers. */
 };
 
 typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
@@ -1165,10 +1193,16 @@ typedef int (*mlx5_flow_action_update_t)
                         struct rte_flow_shared_action *action,
                         const void *action_conf,
                         struct rte_flow_error *error);
+typedef int (*mlx5_flow_action_query_t)
+                       (struct rte_eth_dev *dev,
+                        const struct rte_flow_shared_action *action,
+                        void *data,
+                        struct rte_flow_error *error);
 typedef int (*mlx5_flow_sync_domain_t)
                        (struct rte_eth_dev *dev,
                         uint32_t domains,
                         uint32_t flags);
+
 struct mlx5_flow_driver_ops {
        mlx5_flow_validate_t validate;
        mlx5_flow_prepare_t prepare;
@@ -1189,6 +1223,7 @@ struct mlx5_flow_driver_ops {
        mlx5_flow_action_create_t action_create;
        mlx5_flow_action_destroy_t action_destroy;
        mlx5_flow_action_update_t action_update;
+       mlx5_flow_action_query_t action_query;
        mlx5_flow_sync_domain_t sync_domain;
 };
 
@@ -1202,6 +1237,7 @@ struct flow_grp_info {
        uint64_t fdb_def_rule:1;
        /* force standard group translation */
        uint64_t std_tbl_fix:1;
+       uint64_t skip_scale:1;
 };
 
 static inline bool
@@ -1241,8 +1277,8 @@ tunnel_use_standard_attr_group_translate
 int mlx5_flow_group_to_table(struct rte_eth_dev *dev,
                             const struct mlx5_flow_tunnel *tunnel,
                             uint32_t group, uint32_t *table,
-                            struct flow_grp_info flags,
-                                struct rte_flow_error *error);
+                            const struct flow_grp_info *flags,
+                            struct rte_flow_error *error);
 uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
                                     int tunnel, uint64_t layer_types,
                                     uint64_t hash_fields);
@@ -1457,4 +1493,6 @@ struct mlx5_cache_entry *flow_dv_dest_array_create_cb
                                 struct mlx5_cache_entry *entry, void *cb_ctx);
 void flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list,
                                  struct mlx5_cache_entry *entry);
+struct mlx5_aso_age_action *flow_aso_age_get_by_idx(struct rte_eth_dev *dev,
+                                                   uint32_t age_idx);
 #endif /* RTE_PMD_MLX5_FLOW_H_ */