net/mlx5: fix flow rule configuration

[dpdk.git] / drivers / net / mlx5 / mlx5_flow_dv.c

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 36696c8..536059d 100644 (file)
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -2817,7 +2817,7 @@ flow_dv_validate_attributes(struct rte_eth_dev *dev,
                                (error, EINVAL,
                                 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
                                 NULL, "group must be smaller than "
-                                RTE_STR(MLX5_MAX_FDB_TABLES));
+                                RTE_STR(MLX5_MAX_TABLES_FDB));
        }
        if (!(attributes->egress ^ attributes->ingress))
                return rte_flow_error_set(error, ENOTSUP,
@@ -2892,7 +2892,7 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
                        break;
                case RTE_FLOW_ITEM_TYPE_VLAN:
                        ret = mlx5_flow_validate_item_vlan(items, item_flags,
-                                                          error);
+                                                          dev, error);
                        if (ret < 0)
                                return ret;
                        last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
@@ -2963,7 +2963,6 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
                                             MLX5_FLOW_LAYER_OUTER_L4_UDP;
                        break;
                case RTE_FLOW_ITEM_TYPE_GRE:
-               case RTE_FLOW_ITEM_TYPE_NVGRE:
                        ret = mlx5_flow_validate_item_gre(items, item_flags,
                                                          next_protocol, error);
                        if (ret < 0)
@@ -2971,6 +2970,14 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
                        gre_item = items;
                        last_item = MLX5_FLOW_LAYER_GRE;
                        break;
+               case RTE_FLOW_ITEM_TYPE_NVGRE:
+                       ret = mlx5_flow_validate_item_nvgre(items, item_flags,
+                                                           next_protocol,
+                                                           error);
+                       if (ret < 0)
+                               return ret;
+                       last_item = MLX5_FLOW_LAYER_NVGRE;
+                       break;
                case RTE_FLOW_ITEM_TYPE_GRE_KEY:
                        ret = mlx5_flow_validate_item_gre_key
                                (items, item_flags, gre_item, error);
@@ -3443,6 +3450,8 @@ flow_dv_translate_item_eth(void *matcher, void *key,
 /**
  * Add VLAN item to matcher and to the value.
  *
+ * @param[in, out] dev_flow
+ *   Flow descriptor.
  * @param[in, out] matcher
  *   Flow matcher.
  * @param[in, out] key
@@ -3453,7 +3462,8 @@ flow_dv_translate_item_eth(void *matcher, void *key,
  *   Item is inner pattern.
  */
 static void
-flow_dv_translate_item_vlan(void *matcher, void *key,
+flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
+                           void *matcher, void *key,
                            const struct rte_flow_item *item,
                            int inner)
 {
@@ -3480,6 +3490,12 @@ flow_dv_translate_item_vlan(void *matcher, void *key,
                headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
                                         outer_headers);
                headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
+               /*
+                * This is workaround, masks are not supported,
+                * and pre-validated.
+                */
+               dev_flow->dv.vf_vlan.tag =
+                       rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
        }
        tci_m = rte_be_to_cpu_16(vlan_m->tci);
        tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
@@ -3916,7 +3932,21 @@ flow_dv_translate_item_nvgre(void *matcher, void *key,
        int size;
        int i;
 
-       flow_dv_translate_item_gre(matcher, key, item, inner);
+       /* For NVGRE, GRE header fields must be set with defined values. */
+       const struct rte_flow_item_gre gre_spec = {
+               .c_rsvd0_ver = RTE_BE16(0x2000),
+               .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
+       };
+       const struct rte_flow_item_gre gre_mask = {
+               .c_rsvd0_ver = RTE_BE16(0xB000),
+               .protocol = RTE_BE16(UINT16_MAX),
+       };
+       const struct rte_flow_item gre_item = {
+               .spec = &gre_spec,
+               .mask = &gre_mask,
+               .last = NULL,
+       };
+       flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
        if (!nvgre_v)
                return;
        if (!nvgre_m)
@@ -4294,11 +4324,9 @@ flow_dv_matcher_enable(uint32_t *match_criteria)
        match_criteria_enable |=
                (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
                MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
-#ifdef HAVE_MLX5DV_DR
        match_criteria_enable |=
                (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
                MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
-#endif
        return match_criteria_enable;
 }
 
@@ -4974,7 +5002,8 @@ cnt_err:
                                             MLX5_FLOW_LAYER_OUTER_L2;
                        break;
                case RTE_FLOW_ITEM_TYPE_VLAN:
-                       flow_dv_translate_item_vlan(match_mask, match_value,
+                       flow_dv_translate_item_vlan(dev_flow,
+                                                   match_mask, match_value,
                                                    items, tunnel);
                        matcher.priority = MLX5_PRIORITY_MAP_L2;
                        last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
@@ -5161,13 +5190,14 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
                                             dv->hash_fields,
                                             (*flow->queue),
                                             flow->rss.queue_num);
-                       if (!hrxq)
+                       if (!hrxq) {
                                hrxq = mlx5_hrxq_new
                                        (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
                                         dv->hash_fields, (*flow->queue),
                                         flow->rss.queue_num,
                                         !!(dev_flow->layers &
                                            MLX5_FLOW_LAYER_TUNNEL));
+                       }
                        if (!hrxq) {
                                rte_flow_error_set
                                        (error, rte_errno,
@@ -5189,6 +5219,17 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
                                           "hardware refuses to create flow");
                        goto error;
                }
+               if (priv->vmwa_context &&
+                   dev_flow->dv.vf_vlan.tag &&
+                   !dev_flow->dv.vf_vlan.created) {
+                       /*
+                        * The rule contains the VLAN pattern.
+                        * For VF we are going to create VLAN
+                        * interface to make hypervisor set correct
+                        * e-Switch vport context.
+                        */
+                       mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
+               }
        }
        return 0;
 error:
@@ -5202,6 +5243,9 @@ error:
                                mlx5_hrxq_release(dev, dv->hrxq);
                        dv->hrxq = NULL;
                }
+               if (dev_flow->dv.vf_vlan.tag &&
+                   dev_flow->dv.vf_vlan.created)
+                       mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
        }
        rte_errno = err; /* Restore rte_errno. */
        return -rte_errno;
@@ -5402,6 +5446,9 @@ flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
                                mlx5_hrxq_release(dev, dv->hrxq);
                        dv->hrxq = NULL;
                }
+               if (dev_flow->dv.vf_vlan.tag &&
+                   dev_flow->dv.vf_vlan.created)
+                       mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
        }
 }