net/mlx5: allow implicit LRO flow

[dpdk.git] / drivers / net / mlx5 / mlx5_flow_dv.c

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7240d3b..59ef716 100644 (file)
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -62,9 +62,6 @@ union flow_dv_attr {
        uint32_t attr;
 };
 
-#define MLX5_FLOW_IPV4_LRO (1 << 0)
-#define MLX5_FLOW_IPV6_LRO (1 << 1)
-
 /**
  * Initialize flow attributes structure according to flow items' types.
  *
@@ -2966,7 +2963,6 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
                                             MLX5_FLOW_LAYER_OUTER_L4_UDP;
                        break;
                case RTE_FLOW_ITEM_TYPE_GRE:
-               case RTE_FLOW_ITEM_TYPE_NVGRE:
                        ret = mlx5_flow_validate_item_gre(items, item_flags,
                                                          next_protocol, error);
                        if (ret < 0)
@@ -2974,6 +2970,14 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
                        gre_item = items;
                        last_item = MLX5_FLOW_LAYER_GRE;
                        break;
+               case RTE_FLOW_ITEM_TYPE_NVGRE:
+                       ret = mlx5_flow_validate_item_nvgre(items, item_flags,
+                                                           next_protocol,
+                                                           error);
+                       if (ret < 0)
+                               return ret;
+                       last_item = MLX5_FLOW_LAYER_NVGRE;
+                       break;
                case RTE_FLOW_ITEM_TYPE_GRE_KEY:
                        ret = mlx5_flow_validate_item_gre_key
                                (items, item_flags, gre_item, error);
@@ -3919,7 +3923,21 @@ flow_dv_translate_item_nvgre(void *matcher, void *key,
        int size;
        int i;
 
-       flow_dv_translate_item_gre(matcher, key, item, inner);
+       /* For NVGRE, GRE header fields must be set with defined values. */
+       const struct rte_flow_item_gre gre_spec = {
+               .c_rsvd0_ver = RTE_BE16(0x2000),
+               .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
+       };
+       const struct rte_flow_item_gre gre_mask = {
+               .c_rsvd0_ver = RTE_BE16(0xB000),
+               .protocol = RTE_BE16(UINT16_MAX),
+       };
+       const struct rte_flow_item gre_item = {
+               .spec = &gre_spec,
+               .mask = &gre_mask,
+               .last = NULL,
+       };
+       flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
        if (!nvgre_v)
                return;
        if (!nvgre_m)
@@ -5165,26 +5183,13 @@ flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
                                             (*flow->queue),
                                             flow->rss.queue_num);
                        if (!hrxq) {
-                               int lro = 0;
-
-                               if (mlx5_lro_on(dev)) {
-                                       if ((dev_flow->layers &
-                                            MLX5_FLOW_LAYER_IPV4_LRO)
-                                           == MLX5_FLOW_LAYER_IPV4_LRO)
-                                               lro = MLX5_FLOW_IPV4_LRO;
-                                       else if ((dev_flow->layers &
-                                                 MLX5_FLOW_LAYER_IPV6_LRO)
-                                                == MLX5_FLOW_LAYER_IPV6_LRO)
-                                               lro = MLX5_FLOW_IPV6_LRO;
-                               }
                                hrxq = mlx5_hrxq_new
                                        (dev, flow->key, MLX5_RSS_HASH_KEY_LEN,
                                         dv->hash_fields, (*flow->queue),
                                         flow->rss.queue_num,
                                         !!(dev_flow->layers &
-                                           MLX5_FLOW_LAYER_TUNNEL), lro);
+                                           MLX5_FLOW_LAYER_TUNNEL));
                        }
-
                        if (!hrxq) {
                                rte_flow_error_set
                                        (error, rte_errno,