net/mlx5: create Tx queues with DevX

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index 8695218..1b797da 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -121,7 +121,7 @@ struct mlx5_rxq_data {
        unsigned int err_state:2; /* enum mlx5_rxq_err_state. */
        unsigned int strd_scatter_en:1; /* Scattered packets from a stride. */
        unsigned int lro:1; /* Enable LRO. */
-       unsigned int :1; /* Remaining bits. */
+       unsigned int dynf_meta:1; /* Dynamic metadata is configured. */
        volatile uint32_t *rq_db;
        volatile uint32_t *cq_db;
        uint16_t port_id;
@@ -159,6 +159,8 @@ struct mlx5_rxq_data {
        /* CQ (UAR) access lock required for 32bit implementations */
 #endif
        uint32_t tunnel; /* Tunnel information. */
+       uint64_t flow_meta_mask;
+       int32_t flow_meta_offset;
 } __rte_cache_aligned;
 
 enum mlx5_rxq_obj_type {
@@ -321,6 +323,7 @@ struct mlx5_txq_data {
 
 enum mlx5_txq_obj_type {
        MLX5_TXQ_OBJ_TYPE_IBV,          /* mlx5_txq_obj with ibv_wq. */
+       MLX5_TXQ_OBJ_TYPE_DEVX_SQ,      /* mlx5_txq_obj with mlx5_devx_sq. */
        MLX5_TXQ_OBJ_TYPE_DEVX_HAIRPIN,
        /* mlx5_txq_obj with mlx5_devx_tq and hairpin support. */
 };
@@ -347,6 +350,19 @@ struct mlx5_txq_obj {
                        /* DevX object for Sx queue. */
                        struct mlx5_devx_obj *tis; /* The TIS object. */
                };
+               struct {
+                       struct rte_eth_dev *dev;
+                       struct mlx5_devx_obj *cq_devx;
+                       struct mlx5dv_devx_umem *cq_umem;
+                       void *cq_buf;
+                       int64_t cq_dbrec_offset;
+                       struct mlx5_devx_dbr_page *cq_dbrec_page;
+                       struct mlx5_devx_obj *sq_devx;
+                       struct mlx5dv_devx_umem *sq_umem;
+                       void *sq_buf;
+                       int64_t sq_dbrec_offset;
+                       struct mlx5_devx_dbr_page *sq_dbrec_page;
+               };
        };
 };
 
@@ -432,6 +448,7 @@ int mlx5_tx_hairpin_queue_setup
         const struct rte_eth_hairpin_conf *hairpin_conf);
 void mlx5_tx_queue_release(void *dpdk_txq);
 int mlx5_tx_uar_init_secondary(struct rte_eth_dev *dev, int fd);
+void mlx5_tx_uar_uninit_secondary(struct rte_eth_dev *dev);
 struct mlx5_txq_obj *mlx5_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx,
                                      enum mlx5_txq_obj_type type);
 struct mlx5_txq_obj *mlx5_txq_obj_get(struct rte_eth_dev *dev, uint16_t idx);