common/mlx5: remove NDEBUG

[dpdk.git] / drivers / net / mlx5 / mlx5_rxtx.h

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index fb13919..206c5d2 100644 (file)
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -33,6 +33,7 @@
 
 #include <mlx5_glue.h>
 #include <mlx5_prm.h>
+#include <mlx5_common.h>
 
 #include "mlx5_defs.h"
 #include "mlx5_utils.h"
@@ -43,6 +44,9 @@
 /* Support tunnel matching. */
 #define MLX5_FLOW_TUNNEL 10
 
+/* Mbuf dynamic flag offset for inline. */
+extern uint64_t rte_net_mlx5_dynf_inline_mask;
+
 struct mlx5_rxq_stats {
 #ifdef MLX5_PMD_SOFT_COUNTERS
        uint64_t ipackets; /**< Total of successfully received packets. */
@@ -296,10 +300,10 @@ struct mlx5_txq_data {
        struct mlx5_mr_ctrl mr_ctrl; /* MR control descriptor. */
        struct mlx5_wqe *wqes; /* Work queue. */
        struct mlx5_wqe *wqes_end; /* Work queue array limit. */
-#ifdef NDEBUG
-       uint16_t *fcqs; /* Free completion queue. */
-#else
+#ifdef RTE_LIBRTE_MLX5_DEBUG
        uint32_t *fcqs; /* Free completion queue (debug extended). */
+#else
+       uint16_t *fcqs; /* Free completion queue. */
 #endif
        volatile struct mlx5_cqe *cqes; /* Completion queue. */
        volatile uint32_t *qp_db; /* Work queue doorbell. */
@@ -549,44 +553,6 @@ __mlx5_uar_write64(uint64_t val, void *addr, rte_spinlock_t *lock)
 #define mlx5_uar_write64(val, dst, lock) __mlx5_uar_write64(val, dst, lock)
 #endif
 
-/* CQE status. */
-enum mlx5_cqe_status {
-       MLX5_CQE_STATUS_SW_OWN = -1,
-       MLX5_CQE_STATUS_HW_OWN = -2,
-       MLX5_CQE_STATUS_ERR = -3,
-};
-
-/**
- * Check whether CQE is valid.
- *
- * @param cqe
- *   Pointer to CQE.
- * @param cqes_n
- *   Size of completion queue.
- * @param ci
- *   Consumer index.
- *
- * @return
- *   The CQE status.
- */
-static __rte_always_inline enum mlx5_cqe_status
-check_cqe(volatile struct mlx5_cqe *cqe, const uint16_t cqes_n,
-         const uint16_t ci)
-{
-       const uint16_t idx = ci & cqes_n;
-       const uint8_t op_own = cqe->op_own;
-       const uint8_t op_owner = MLX5_CQE_OWNER(op_own);
-       const uint8_t op_code = MLX5_CQE_OPCODE(op_own);
-
-       if (unlikely((op_owner != (!!(idx))) || (op_code == MLX5_CQE_INVALID)))
-               return MLX5_CQE_STATUS_HW_OWN;
-       rte_cio_rmb();
-       if (unlikely(op_code == MLX5_CQE_RESP_ERR ||
-                    op_code == MLX5_CQE_REQ_ERR))
-               return MLX5_CQE_STATUS_ERR;
-       return MLX5_CQE_STATUS_SW_OWN;
-}
-
 /**
  * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which the
  * cloned mbuf is allocated is returned instead.