net/mlx5: fix running without Rx queue
[dpdk.git] / drivers / net / mlx5 / mlx5_trigger.c
index 69681e2..571b7a0 100644 (file)
@@ -13,6 +13,7 @@
 #include "mlx5.h"
 #include "mlx5_rxtx.h"
 #include "mlx5_utils.h"
+#include "rte_pmd_mlx5.h"
 
 /**
  * Stop traffic on Tx queues.
@@ -51,9 +52,15 @@ mlx5_txq_start(struct rte_eth_dev *dev)
 
                if (!txq_ctrl)
                        continue;
-               txq_alloc_elts(txq_ctrl);
-               txq_ctrl->ibv = mlx5_txq_ibv_new(dev, i);
-               if (!txq_ctrl->ibv) {
+               if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
+                       txq_ctrl->obj = mlx5_txq_obj_new
+                               (dev, i, MLX5_TXQ_OBJ_TYPE_DEVX_HAIRPIN);
+               } else {
+                       txq_alloc_elts(txq_ctrl);
+                       txq_ctrl->obj = mlx5_txq_obj_new
+                               (dev, i, MLX5_TXQ_OBJ_TYPE_IBV);
+               }
+               if (!txq_ctrl->obj) {
                        rte_errno = ENOMEM;
                        goto error;
                }
@@ -99,7 +106,17 @@ mlx5_rxq_start(struct rte_eth_dev *dev)
        struct mlx5_priv *priv = dev->data->dev_private;
        unsigned int i;
        int ret = 0;
+       enum mlx5_rxq_obj_type obj_type = MLX5_RXQ_OBJ_TYPE_IBV;
+       struct mlx5_rxq_data *rxq = NULL;
+
+       for (i = 0; i < priv->rxqs_n; ++i) {
+               rxq = (*priv->rxqs)[i];
 
+               if (rxq && rxq->lro) {
+                       obj_type =  MLX5_RXQ_OBJ_TYPE_DEVX_RQ;
+                       break;
+               }
+       }
        /* Allocate/reuse/resize mempool for Multi-Packet RQ. */
        if (mlx5_mprq_alloc_mp(dev)) {
                /* Should not release Rx queues but return immediately. */
@@ -111,6 +128,13 @@ mlx5_rxq_start(struct rte_eth_dev *dev)
 
                if (!rxq_ctrl)
                        continue;
+               if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) {
+                       rxq_ctrl->obj = mlx5_rxq_obj_new
+                               (dev, i, MLX5_RXQ_OBJ_TYPE_DEVX_HAIRPIN);
+                       if (!rxq_ctrl->obj)
+                               goto error;
+                       continue;
+               }
                /* Pre-register Rx mempool. */
                mp = mlx5_rxq_mprq_enabled(&rxq_ctrl->rxq) ?
                     rxq_ctrl->rxq.mprq_mp : rxq_ctrl->rxq.mp;
@@ -123,9 +147,13 @@ mlx5_rxq_start(struct rte_eth_dev *dev)
                ret = rxq_alloc_elts(rxq_ctrl);
                if (ret)
                        goto error;
-               rxq_ctrl->ibv = mlx5_rxq_ibv_new(dev, i);
-               if (!rxq_ctrl->ibv)
+               rxq_ctrl->obj = mlx5_rxq_obj_new(dev, i, obj_type);
+               if (!rxq_ctrl->obj)
                        goto error;
+               if (obj_type == MLX5_RXQ_OBJ_TYPE_IBV)
+                       rxq_ctrl->wqn = rxq_ctrl->obj->wq->wq_num;
+               else if (obj_type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ)
+                       rxq_ctrl->wqn = rxq_ctrl->obj->rq->id;
        }
        return 0;
 error:
@@ -137,6 +165,96 @@ error:
        return -rte_errno;
 }
 
+/**
+ * Binds Tx queues to Rx queues for hairpin.
+ *
+ * Binds Tx queues to the target Rx queues.
+ *
+ * @param dev
+ *   Pointer to Ethernet device structure.
+ *
+ * @return
+ *   0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+static int
+mlx5_hairpin_bind(struct rte_eth_dev *dev)
+{
+       struct mlx5_priv *priv = dev->data->dev_private;
+       struct mlx5_devx_modify_sq_attr sq_attr = { 0 };
+       struct mlx5_devx_modify_rq_attr rq_attr = { 0 };
+       struct mlx5_txq_ctrl *txq_ctrl;
+       struct mlx5_rxq_ctrl *rxq_ctrl;
+       struct mlx5_devx_obj *sq;
+       struct mlx5_devx_obj *rq;
+       unsigned int i;
+       int ret = 0;
+
+       for (i = 0; i != priv->txqs_n; ++i) {
+               txq_ctrl = mlx5_txq_get(dev, i);
+               if (!txq_ctrl)
+                       continue;
+               if (txq_ctrl->type != MLX5_TXQ_TYPE_HAIRPIN) {
+                       mlx5_txq_release(dev, i);
+                       continue;
+               }
+               if (!txq_ctrl->obj) {
+                       rte_errno = ENOMEM;
+                       DRV_LOG(ERR, "port %u no txq object found: %d",
+                               dev->data->port_id, i);
+                       mlx5_txq_release(dev, i);
+                       return -rte_errno;
+               }
+               sq = txq_ctrl->obj->sq;
+               rxq_ctrl = mlx5_rxq_get(dev,
+                                       txq_ctrl->hairpin_conf.peers[0].queue);
+               if (!rxq_ctrl) {
+                       mlx5_txq_release(dev, i);
+                       rte_errno = EINVAL;
+                       DRV_LOG(ERR, "port %u no rxq object found: %d",
+                               dev->data->port_id,
+                               txq_ctrl->hairpin_conf.peers[0].queue);
+                       return -rte_errno;
+               }
+               if (rxq_ctrl->type != MLX5_RXQ_TYPE_HAIRPIN ||
+                   rxq_ctrl->hairpin_conf.peers[0].queue != i) {
+                       rte_errno = ENOMEM;
+                       DRV_LOG(ERR, "port %u Tx queue %d can't be binded to "
+                               "Rx queue %d", dev->data->port_id,
+                               i, txq_ctrl->hairpin_conf.peers[0].queue);
+                       goto error;
+               }
+               rq = rxq_ctrl->obj->rq;
+               if (!rq) {
+                       rte_errno = ENOMEM;
+                       DRV_LOG(ERR, "port %u hairpin no matching rxq: %d",
+                               dev->data->port_id,
+                               txq_ctrl->hairpin_conf.peers[0].queue);
+                       goto error;
+               }
+               sq_attr.state = MLX5_SQC_STATE_RDY;
+               sq_attr.sq_state = MLX5_SQC_STATE_RST;
+               sq_attr.hairpin_peer_rq = rq->id;
+               sq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
+               ret = mlx5_devx_cmd_modify_sq(sq, &sq_attr);
+               if (ret)
+                       goto error;
+               rq_attr.state = MLX5_SQC_STATE_RDY;
+               rq_attr.rq_state = MLX5_SQC_STATE_RST;
+               rq_attr.hairpin_peer_sq = sq->id;
+               rq_attr.hairpin_peer_vhca = priv->config.hca_attr.vhca_id;
+               ret = mlx5_devx_cmd_modify_rq(rq, &rq_attr);
+               if (ret)
+                       goto error;
+               mlx5_txq_release(dev, i);
+               mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
+       }
+       return 0;
+error:
+       mlx5_txq_release(dev, i);
+       mlx5_rxq_release(dev, txq_ctrl->hairpin_conf.peers[0].queue);
+       return -rte_errno;
+}
+
 /**
  * DPDK callback to start the device.
  *
@@ -153,8 +271,23 @@ mlx5_dev_start(struct rte_eth_dev *dev)
 {
        struct mlx5_priv *priv = dev->data->dev_private;
        int ret;
+       int fine_inline;
 
        DRV_LOG(DEBUG, "port %u starting device", dev->data->port_id);
+       fine_inline = rte_mbuf_dynflag_lookup
+               (RTE_PMD_MLX5_FINE_GRANULARITY_INLINE, NULL);
+       if (fine_inline > 0)
+               rte_net_mlx5_dynf_inline_mask = 1UL << fine_inline;
+       else
+               rte_net_mlx5_dynf_inline_mask = 0;
+       if (dev->data->nb_rx_queues > 0) {
+               ret = mlx5_dev_configure_rss_reta(dev);
+               if (ret) {
+                       DRV_LOG(ERR, "port %u reta config failed: %s",
+                               dev->data->port_id, strerror(rte_errno));
+                       return -rte_errno;
+               }
+       }
        ret = mlx5_txq_start(dev);
        if (ret) {
                DRV_LOG(ERR, "port %u Tx queue allocation failed: %s",
@@ -168,6 +301,13 @@ mlx5_dev_start(struct rte_eth_dev *dev)
                mlx5_txq_stop(dev);
                return -rte_errno;
        }
+       ret = mlx5_hairpin_bind(dev);
+       if (ret) {
+               DRV_LOG(ERR, "port %u hairpin binding failed: %s",
+                       dev->data->port_id, strerror(rte_errno));
+               mlx5_txq_stop(dev);
+               return -rte_errno;
+       }
        dev->data->dev_started = 1;
        ret = mlx5_rx_intr_vec_enable(dev);
        if (ret) {
@@ -275,6 +415,32 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
        unsigned int j;
        int ret;
 
+       /*
+        * Hairpin txq default flow should be created no matter if it is
+        * isolation mode. Or else all the packets to be sent will be sent
+        * out directly without the TX flow actions, e.g. encapsulation.
+        */
+       for (i = 0; i != priv->txqs_n; ++i) {
+               struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
+               if (!txq_ctrl)
+                       continue;
+               if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
+                       ret = mlx5_ctrl_flow_source_queue(dev, i);
+                       if (ret) {
+                               mlx5_txq_release(dev, i);
+                               goto error;
+                       }
+               }
+               mlx5_txq_release(dev, i);
+       }
+       if (priv->config.dv_esw_en && !priv->config.vf) {
+               if (mlx5_flow_create_esw_table_zero_flow(dev))
+                       priv->fdb_def_rule = 1;
+               else
+                       DRV_LOG(INFO, "port %u FDB default rule cannot be"
+                               " configured - only Eswitch group 0 flows are"
+                               " supported.", dev->data->port_id);
+       }
        if (priv->isolated)
                return 0;
        if (dev->data->promiscuous) {
@@ -337,7 +503,7 @@ mlx5_traffic_enable(struct rte_eth_dev *dev)
                        continue;
                memcpy(&unicast.dst.addr_bytes,
                       mac->addr_bytes,
-                      ETHER_ADDR_LEN);
+                      RTE_ETHER_ADDR_LEN);
                for (j = 0; j != vlan_filter_n; ++j) {
                        uint16_t vlan = priv->vlan_filter[j];