-/*
- * Copyright (c) 2016 QLogic Corporation.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2016 - 2018 Cavium Inc.
* All rights reserved.
- * www.qlogic.com
- *
- * See LICENSE.qede_pmd for copyright and licensing details.
+ * www.cavium.com
*/
#ifndef __BCM_OSAL_H
#define __BCM_OSAL_H
+#include <stdbool.h>
+#include <time.h>
+#include <rte_bitops.h>
#include <rte_byteorder.h>
#include <rte_spinlock.h>
#include <rte_malloc.h>
#include <rte_debug.h>
#include <rte_ether.h>
#include <rte_io.h>
+#include <rte_version.h>
/* Forward declaration */
struct ecore_dev;
struct ecore_hwfn;
+struct ecore_ptt;
struct ecore_vf_acquire_sw_info;
struct vf_pf_resc_request;
enum ecore_mcp_protocol_type;
#define OSAL_WARN(arg1, arg2, arg3, ...) (0)
+#define UNUSED(x) (void)(x)
+
/* Memory Types */
typedef uint8_t u8;
typedef uint16_t u16;
#define osal_uintptr_t uintptr_t
-typedef phys_addr_t dma_addr_t;
+typedef rte_iova_t dma_addr_t;
typedef rte_spinlock_t osal_spinlock_t;
typedef intptr_t osal_int_ptr_t;
-typedef int bool;
-#define true 1
-#define false 0
-
#define nothing do {} while (0)
/* Delays */
((u8 *)(uintptr_t)(_p_hwfn->doorbells) + \
(_db_addr)), (u32)_val)
+#define DIRECT_REG_RD64(hwfn, addr) rte_read64(addr)
+#define DIRECT_REG_WR64(hwfn, addr, value) rte_write64((value), (addr))
+
/* Mutexes */
typedef pthread_mutex_t osal_mutex_t;
#define OSAL_SPIN_LOCK_INIT(lock) rte_spinlock_init(lock)
#define OSAL_SPIN_LOCK(lock) rte_spinlock_lock(lock)
#define OSAL_SPIN_UNLOCK(lock) rte_spinlock_unlock(lock)
-#define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) nothing
+#define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) \
+ do { \
+ UNUSED(lock); \
+ flags = 0; \
+ UNUSED(flags); \
+ } while (0)
#define OSAL_SPIN_UNLOCK_IRQSAVE(lock, flags) nothing
#define OSAL_SPIN_LOCK_ALLOC(hwfn, lock) nothing
#define OSAL_SPIN_LOCK_DEALLOC(lock) nothing
#define OSAL_BITS_PER_UL_MASK (OSAL_BITS_PER_UL - 1)
/* Bitops */
-void qede_set_bit(u32, unsigned long *);
#define OSAL_SET_BIT(bit, bitmap) \
- qede_set_bit(bit, bitmap)
+ rte_bit_relaxed_set32(bit, bitmap)
-void qede_clr_bit(u32, unsigned long *);
#define OSAL_CLEAR_BIT(bit, bitmap) \
- qede_clr_bit(bit, bitmap)
+ rte_bit_relaxed_clear32(bit, bitmap)
-bool qede_test_bit(u32, unsigned long *);
-#define OSAL_TEST_BIT(bit, bitmap) \
- qede_test_bit(bit, bitmap)
+#define OSAL_GET_BIT(bit, bitmap) \
+ rte_bit_relaxed_get32(bit, bitmap)
u32 qede_find_first_bit(unsigned long *, u32);
#define OSAL_FIND_FIRST_BIT(bitmap, length) \
qede_find_first_bit(bitmap, length)
-u32 qede_find_first_zero_bit(unsigned long *, u32);
+u32 qede_find_first_zero_bit(u32 *bitmap, u32 length);
#define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \
qede_find_first_zero_bit(bitmap, length)
#define OSAL_BUILD_BUG_ON(cond) nothing
-#define ETH_ALEN ETHER_ADDR_LEN
+#define ETH_ALEN RTE_ETHER_ADDR_LEN
+#define ETHER_TYPE_VLAN RTE_ETHER_TYPE_VLAN
+#define ETHER_TYPE_QINQ RTE_ETHER_TYPE_QINQ
#define OSAL_BITMAP_WEIGHT(bitmap, count) 0
#define OSAL_LINK_UPDATE(hwfn) qed_link_update(hwfn)
+#define OSAL_TRANSCEIVER_UPDATE(hwfn) nothing
#define OSAL_DCBX_AEN(hwfn, mib_type) nothing
/* SR-IOV channel */
#define OSAL_IOV_VF_VPORT_UPDATE(hwfn, vfid, p_params, p_mask) 0
#define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(_dev_p, _resc_resp) 0
#define OSAL_IOV_GET_OS_TYPE() 0
-#define OSAL_IOV_VF_MSG_TYPE(hwfn, vfid, vf_msg_type) 0
-#define OSAL_IOV_PF_RESP_TYPE(hwfn, vfid, pf_resp_type) 0
+#define OSAL_IOV_VF_MSG_TYPE(hwfn, vfid, vf_msg_type) nothing
+#define OSAL_IOV_PF_RESP_TYPE(hwfn, vfid, pf_resp_type) nothing
+#define OSAL_IOV_VF_VPORT_STOP(hwfn, vf) nothing
u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
u8 *input_buf, u32 max_size, u8 *unzip_buf);
/* TODO: */
#define OSAL_SCHEDULE_RECOVERY_HANDLER(hwfn) nothing
+
+int qede_save_fw_dump(uint8_t port_id);
+
+#define OSAL_SAVE_FW_DUMP(port_id) qede_save_fw_dump(port_id)
+
#define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) \
qede_hw_err_notify(hwfn, err_type)
#define OSAL_NVM_IS_ACCESS_ENABLED(hwfn) (1)
-#define OSAL_NUM_ACTIVE_CPU() 0
+#define OSAL_NUM_CPUS() 0
/* Utility functions */
#define OSAL_REG_ADDR(_p_hwfn, _offset) \
(void *)((u8 *)(uintptr_t)(_p_hwfn->regview) + (_offset))
#define OSAL_PAGE_SIZE 4096
+#define OSAL_CACHE_LINE_SIZE RTE_CACHE_LINE_SIZE
#define OSAL_IOMEM volatile
+#define OSAL_UNUSED __rte_unused
#define OSAL_UNLIKELY(x) __builtin_expect(!!(x), 0)
#define OSAL_MIN_T(type, __min1, __min2) \
((type)(__min1) < (type)(__min2) ? (type)(__min1) : (type)(__min2))
#define OSAL_CRC32(crc, buf, length) qede_crc32(crc, buf, length)
#define OSAL_CRC8_POPULATE(table, polynomial) nothing
#define OSAL_CRC8(table, pdata, nbytes, crc) 0
-#define OSAL_MFW_TLV_REQ(p_hwfn) (0)
+#define OSAL_MFW_TLV_REQ(p_hwfn) nothing
#define OSAL_MFW_FILL_TLV_DATA(type, buf, data) (0)
+#define OSAL_HW_INFO_CHANGE(p_hwfn, change) nothing
+#define OSAL_MFW_CMD_PREEMPT(p_hwfn) nothing
#define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, mask, b_update, tunn) 0
+
+#define OSAL_DIV_S64(a, b) ((a) / (b))
+#define OSAL_LLDP_RX_TLVS(p_hwfn, tlv_buf, tlv_size) nothing
+void qed_set_platform_str(struct ecore_hwfn *p_hwfn,
+ char *buf_str, u32 buf_size);
+#define OSAL_SET_PLATFORM_STR(p_hwfn, buf_str, buf_size) \
+ qed_set_platform_str(p_hwfn, buf_str, buf_size)
+#define OSAL_GET_EPOCH(p_hwfn) ((u32)time(NULL))
+enum dbg_status qed_dbg_alloc_user_data(struct ecore_hwfn *p_hwfn,
+ void **user_data_ptr);
+#define OSAL_DBG_ALLOC_USER_DATA(p_hwfn, user_data_ptr) \
+ qed_dbg_alloc_user_data(p_hwfn, user_data_ptr)
+#define OSAL_DB_REC_OCCURRED(p_hwfn) nothing
+
#endif /* __BCM_OSAL_H */
git.droids-corp.org / dpdk.git / blobdiff