net/qede/base: upgrade the FW to 8.20.0.0
[dpdk.git] / drivers / net / qede / qede_ethdev.h
index 19a4ece..9a93286 100644 (file)
@@ -14,6 +14,7 @@
 
 #include <rte_ether.h>
 #include <rte_ethdev.h>
+#include <rte_ethdev_pci.h>
 #include <rte_dev.h>
 #include <rte_ip.h>
 
 #include "base/nvm_cfg.h"
 #include "base/ecore_iov_api.h"
 #include "base/ecore_sp_commands.h"
+#include "base/ecore_l2.h"
+#include "base/ecore_dev_api.h"
+#include "base/ecore_l2.h"
 
 #include "qede_logs.h"
 #include "qede_if.h"
-#include "qede_eth_if.h"
-
 #include "qede_rxtx.h"
 
 #define qede_stringify1(x...)          #x
@@ -46,8 +48,8 @@
 
 /* Driver versions */
 #define QEDE_PMD_VER_PREFIX            "QEDE PMD"
-#define QEDE_PMD_VERSION_MAJOR         1
-#define QEDE_PMD_VERSION_MINOR         2
+#define QEDE_PMD_VERSION_MAJOR         2
+#define QEDE_PMD_VERSION_MINOR         5
 #define QEDE_PMD_VERSION_REVISION       0
 #define QEDE_PMD_VERSION_PATCH         1
 
                                        (edev)->dev_info.num_tc)
 
 #define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
-#define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
-#define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
-                                       (qdev)->num_tc)
-
-#define QEDE_FASTPATH_TX        (1 << 0)
-#define QEDE_FASTPATH_RX        (1 << 1)
+#define QEDE_RSS_COUNT(qdev) ((qdev)->num_rx_queues)
+#define QEDE_TSS_COUNT(qdev) ((qdev)->num_tx_queues)
 
 #define QEDE_DUPLEX_FULL       1
 #define QEDE_DUPLEX_HALF       2
 #define CHIP_NUM_57980S_25                     0x1656
 #define CHIP_NUM_57980S_IOV                    0x1664
 #define CHIP_NUM_57980S_100                    0x1644
+#define CHIP_NUM_57980S_50                     0x1654
 #define CHIP_NUM_AH_50G                               0x8070
 #define CHIP_NUM_AH_10G                        0x8071
 #define CHIP_NUM_AH_40G                               0x8072
 #define PCI_DEVICE_ID_QLOGIC_57980S_25         CHIP_NUM_57980S_25
 #define PCI_DEVICE_ID_QLOGIC_57980S_IOV        CHIP_NUM_57980S_IOV
 #define PCI_DEVICE_ID_QLOGIC_57980S_100        CHIP_NUM_57980S_100
+#define PCI_DEVICE_ID_QLOGIC_57980S_50         CHIP_NUM_57980S_50
 #define PCI_DEVICE_ID_QLOGIC_AH_50G            CHIP_NUM_AH_50G
 #define PCI_DEVICE_ID_QLOGIC_AH_10G            CHIP_NUM_AH_10G
 #define PCI_DEVICE_ID_QLOGIC_AH_40G            CHIP_NUM_AH_40G
@@ -129,12 +129,15 @@ extern char fw_file[];
 /* Number of PF connections - 32 RX + 32 TX */
 #define QEDE_PF_NUM_CONNS              (64)
 
-/* Port/function states */
-enum qede_dev_state {
-       QEDE_DEV_INIT, /* Init the chip and Slowpath */
-       QEDE_DEV_CONFIG, /* Create Vport/Fastpath resources */
-       QEDE_DEV_START, /* Start RX/TX queues, enable traffic */
-       QEDE_DEV_STOP, /* Deactivate vport and stop traffic */
+/* Maximum number of flowdir filters */
+#define QEDE_RFS_MAX_FLTR              (256)
+
+#define QEDE_MAX_MCAST_FILTERS         (64)
+
+enum qed_filter_rx_mode_type {
+       QED_FILTER_RX_MODE_TYPE_REGULAR,
+       QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC,
+       QED_FILTER_RX_MODE_TYPE_PROMISC,
 };
 
 struct qede_vlan_entry {
@@ -154,29 +157,40 @@ struct qede_ucast_entry {
        SLIST_ENTRY(qede_ucast_entry) list;
 };
 
+struct qede_fdir_entry {
+       uint32_t soft_id; /* unused for now */
+       uint16_t pkt_len; /* actual packet length to match */
+       uint16_t rx_queue; /* queue to be steered to */
+       const struct rte_memzone *mz; /* mz used to hold L2 frame */
+       SLIST_ENTRY(qede_fdir_entry) list;
+};
+
+struct qede_fdir_info {
+       struct ecore_arfs_config_params arfs;
+       uint16_t filter_count;
+       SLIST_HEAD(fdir_list_head, qede_fdir_entry)fdir_list_head;
+};
+
+
 /*
  *  Structure to store private data for each port.
  */
 struct qede_dev {
        struct ecore_dev edev;
-       uint8_t protocol;
        const struct qed_eth_ops *ops;
        struct qed_dev_eth_info dev_info;
        struct ecore_sb_info *sb_array;
        struct qede_fastpath *fp_array;
-       uint8_t num_tc;
        uint16_t mtu;
+       uint16_t new_mtu;
        bool rss_enable;
        struct rte_eth_rss_conf rss_conf;
        uint16_t rss_ind_table[ECORE_RSS_IND_TABLE_SIZE];
        uint64_t rss_hf;
        uint8_t rss_key_len;
-       uint32_t flags;
-       bool gro_disable;
-       uint16_t num_queues;
-       uint8_t fp_num_tx;
-       uint8_t fp_num_rx;
-       enum qede_dev_state state;
+       bool enable_lro;
+       uint8_t num_rx_queues;
+       uint8_t num_tx_queues;
        SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head;
        uint16_t configured_vlans;
        bool accept_any_vlan;
@@ -188,29 +202,47 @@ struct qede_dev {
        bool handle_hw_err;
        uint16_t num_tunn_filters;
        uint16_t vxlan_filter_type;
+       struct qede_fdir_info fdir_info;
+       bool vlan_strip_flg;
        char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
 };
 
-/* Static functions */
-static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
-                               uint16_t vlan_id, int on);
-
-static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
-                               struct rte_eth_rss_conf *rss_conf);
-
-static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
-                               struct rte_eth_rss_reta_entry64 *reta_conf,
-                               uint16_t reta_size);
-
-static void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf);
+/* Non-static functions */
+int qede_config_rss(struct rte_eth_dev *eth_dev);
 
-static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags);
+int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
+                        struct rte_eth_rss_conf *rss_conf);
 
-/* Non-static functions */
-void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf);
+int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
+                        struct rte_eth_rss_reta_entry64 *reta_conf,
+                        uint16_t reta_size);
 
 int qed_fill_eth_dev_info(struct ecore_dev *edev,
                                 struct qed_dev_eth_info *info);
 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
 
+int qede_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type type,
+                        enum rte_filter_op op, void *arg);
+
+int qede_fdir_filter_conf(struct rte_eth_dev *eth_dev,
+                         enum rte_filter_op filter_op, void *arg);
+
+int qede_ntuple_filter_conf(struct rte_eth_dev *eth_dev,
+                           enum rte_filter_op filter_op, void *arg);
+
+int qede_check_fdir_support(struct rte_eth_dev *eth_dev);
+
+uint16_t qede_fdir_construct_pkt(struct rte_eth_dev *eth_dev,
+                                struct rte_eth_fdir_filter *fdir,
+                                void *buff,
+                                struct ecore_arfs_config_params *params);
+
+void qede_fdir_dealloc_resc(struct rte_eth_dev *eth_dev);
+
+int qede_activate_vport(struct rte_eth_dev *eth_dev, bool flg);
+
+int qede_update_mtu(struct rte_eth_dev *eth_dev, uint16_t mtu);
+
+int qede_enable_tpa(struct rte_eth_dev *eth_dev, bool flg);
+
 #endif /* _QEDE_ETHDEV_H_ */