#include "qede_ethdev.h"
-static uint8_t npar_tx_switching = 1;
-
/* Alarm timeout. */
#define QEDE_ALARM_TIMEOUT_US 100000
static int qed_slowpath_start(struct ecore_dev *edev,
struct qed_slowpath_params *params)
{
- bool allow_npar_tx_switching;
const uint8_t *data = NULL;
struct ecore_hwfn *hwfn;
struct ecore_mcp_drv_version drv_version;
struct ecore_hw_init_params hw_init_params;
struct qede_dev *qdev = (struct qede_dev *)edev;
+ struct ecore_ptt *p_ptt;
int rc;
-#ifdef CONFIG_ECORE_BINARY_FW
if (IS_PF(edev)) {
+#ifdef CONFIG_ECORE_BINARY_FW
rc = qed_load_firmware_data(edev);
if (rc) {
DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
goto err;
}
- }
#endif
+ hwfn = ECORE_LEADING_HWFN(edev);
+ if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
+ p_ptt = ecore_ptt_acquire(hwfn);
+ if (p_ptt) {
+ ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
+ } else {
+ DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+ }
+ }
rc = qed_nic_setup(edev);
if (rc)
data = (const uint8_t *)edev->firmware + sizeof(u32);
#endif
- allow_npar_tx_switching = npar_tx_switching ? true : false;
-
/* Start the slowpath */
memset(&hw_init_params, 0, sizeof(hw_init_params));
hw_init_params.b_hw_start = true;
hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
- hw_init_params.allow_npar_tx_switch = allow_npar_tx_switching;
+ hw_init_params.allow_npar_tx_switch = true;
hw_init_params.bin_fw_data = data;
+ hw_init_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
+ hw_init_params.avoid_eng_reset = false;
rc = ecore_hw_init(edev, &hw_init_params);
if (rc) {
DP_ERR(edev, "ecore_hw_init failed\n");
memset(dev_info, 0, sizeof(struct qed_dev_info));
- if (tun->tunn_mode & OSAL_BIT(ECORE_MODE_VXLAN_TUNN) &&
- tun->tunn_clss_vxlan == ECORE_TUNN_CLSS_MAC_VLAN)
+ if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
+ tun->vxlan.b_mode_enabled)
dev_info->vxlan_enable = true;
- if (tun->tunn_mode & OSAL_BIT(ECORE_MODE_L2GRE_TUNN) &&
- tun->tunn_mode & OSAL_BIT(ECORE_MODE_IPGRE_TUNN) &&
- tun->tunn_clss_l2gre == ECORE_TUNN_CLSS_MAC_VLAN &&
- tun->tunn_clss_ipgre == ECORE_TUNN_CLSS_MAC_VLAN)
+ if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
+ tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
+ tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
dev_info->gre_enable = true;
- if (tun->tunn_mode & OSAL_BIT(ECORE_MODE_L2GENEVE_TUNN) &&
- tun->tunn_mode & OSAL_BIT(ECORE_MODE_IPGENEVE_TUNN) &&
- tun->tunn_clss_l2geneve == ECORE_TUNN_CLSS_MAC_VLAN &&
- tun->tunn_clss_ipgeneve == ECORE_TUNN_CLSS_MAC_VLAN)
+ if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
+ tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
+ tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
dev_info->geneve_enable = true;
dev_info->num_hwfns = edev->num_hwfns;
rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
ETHER_ADDR_LEN);
+ dev_info->fw_major = FW_MAJOR_VERSION;
+ dev_info->fw_minor = FW_MINOR_VERSION;
+ dev_info->fw_rev = FW_REVISION_VERSION;
+ dev_info->fw_eng = FW_ENGINEERING_VERSION;
+
if (IS_PF(edev)) {
- dev_info->fw_major = FW_MAJOR_VERSION;
- dev_info->fw_minor = FW_MINOR_VERSION;
- dev_info->fw_rev = FW_REVISION_VERSION;
- dev_info->fw_eng = FW_ENGINEERING_VERSION;
dev_info->mf_mode = edev->mf_mode;
dev_info->tx_switching = false;
ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
}
} else {
- ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
- &dev_info->fw_minor, &dev_info->fw_rev,
- &dev_info->fw_eng);
-
ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
&dev_info->mfw_rev, NULL);
}
return rc;
}
-static int qed_nic_reset(struct ecore_dev *edev)
-{
- int rc;
-
- rc = ecore_hw_reset(edev);
- if (rc)
- return rc;
-
- ecore_resc_free(edev);
-
- return 0;
-}
-
static int qed_slowpath_stop(struct ecore_dev *edev)
{
#ifdef CONFIG_QED_SRIOV
if (IS_QED_ETH_IF(edev))
qed_sriov_disable(edev, true);
#endif
- qed_nic_stop(edev);
}
- qed_nic_reset(edev);
+ qed_nic_stop(edev);
+
+ ecore_resc_free(edev);
qed_stop_iov_task(edev);
return 0;