#include "efx_regs_ef100.h"
#include "efx.h"
+#include "sfc.h"
#include "sfc_debug.h"
+#include "sfc_flow_tunnel.h"
#include "sfc_tweak.h"
#include "sfc_dp_rx.h"
#include "sfc_kvargs.h"
#define SFC_EF100_RXQ_RSS_HASH 0x10
#define SFC_EF100_RXQ_USER_MARK 0x20
#define SFC_EF100_RXQ_FLAG_INTR_EN 0x40
+#define SFC_EF100_RXQ_INGRESS_MPORT 0x80
+#define SFC_EF100_RXQ_USER_FLAG 0x100
unsigned int ptr_mask;
unsigned int evq_phase_bit_shift;
unsigned int ready_pkts;
uint64_t rearm_data;
uint16_t buf_size;
uint16_t prefix_size;
+ uint32_t user_mark_mask;
unsigned int evq_hw_index;
volatile void *evq_prime;
return EFX_WORD_FIELD(class,
ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L4_CSUM) ==
ESE_GZ_RH_HCLASS_L4_CSUM_GOOD ?
- PKT_RX_L4_CKSUM_GOOD : PKT_RX_L4_CKSUM_BAD;
+ RTE_MBUF_F_RX_L4_CKSUM_GOOD : RTE_MBUF_F_RX_L4_CKSUM_BAD;
}
static inline uint64_t
return EFX_WORD_FIELD(class,
ESF_GZ_RX_PREFIX_HCLASS_TUN_OUTER_L4_CSUM) ==
ESE_GZ_RH_HCLASS_L4_CSUM_GOOD ?
- PKT_RX_OUTER_L4_CKSUM_GOOD : PKT_RX_OUTER_L4_CKSUM_BAD;
+ RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD : RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;
}
static uint32_t
ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L3_CLASS)) {
case ESE_GZ_RH_HCLASS_L3_CLASS_IP4GOOD:
ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
- *ol_flags |= PKT_RX_IP_CKSUM_GOOD;
+ *ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
break;
case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
- *ol_flags |= PKT_RX_IP_CKSUM_BAD;
+ *ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
break;
case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
ptype |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
break;
case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
ptype |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;
- *ol_flags |= PKT_RX_OUTER_IP_CKSUM_BAD;
+ *ol_flags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;
break;
case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
ptype |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;
ESF_GZ_RX_PREFIX_HCLASS_NT_OR_INNER_L3_CLASS)) {
case ESE_GZ_RH_HCLASS_L3_CLASS_IP4GOOD:
ptype |= RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
- *ol_flags |= PKT_RX_IP_CKSUM_GOOD;
+ *ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;
break;
case ESE_GZ_RH_HCLASS_L3_CLASS_IP4BAD:
ptype |= RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
- *ol_flags |= PKT_RX_IP_CKSUM_BAD;
+ *ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;
break;
case ESE_GZ_RH_HCLASS_L3_CLASS_IP6:
ptype |= RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
SFC_EF100_RX_PREFIX_FIELD(LENGTH, B_FALSE),
SFC_EF100_RX_PREFIX_FIELD(RSS_HASH_VALID, B_FALSE),
SFC_EF100_RX_PREFIX_FIELD(CLASS, B_FALSE),
+ EFX_RX_PREFIX_FIELD(INGRESS_MPORT,
+ ESF_GZ_RX_PREFIX_INGRESS_MPORT, B_FALSE),
SFC_EF100_RX_PREFIX_FIELD(RSS_HASH, B_FALSE),
+ SFC_EF100_RX_PREFIX_FIELD(USER_FLAG, B_FALSE),
SFC_EF100_RX_PREFIX_FIELD(USER_MARK, B_FALSE),
#undef SFC_EF100_RX_PREFIX_FIELD
static bool
sfc_ef100_rx_prefix_to_offloads(const struct sfc_ef100_rxq *rxq,
- const efx_oword_t *rx_prefix,
+ const efx_xword_t *rx_prefix,
struct rte_mbuf *m)
{
const efx_word_t *class;
m->packet_type = sfc_ef100_rx_class_decode(*class, &ol_flags);
if ((rxq->flags & SFC_EF100_RXQ_RSS_HASH) &&
- EFX_TEST_OWORD_BIT(rx_prefix[0],
+ EFX_TEST_XWORD_BIT(rx_prefix[0],
ESF_GZ_RX_PREFIX_RSS_HASH_VALID_LBN)) {
- ol_flags |= PKT_RX_RSS_HASH;
- /* EFX_OWORD_FIELD converts little-endian to CPU */
- m->hash.rss = EFX_OWORD_FIELD(rx_prefix[0],
+ ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
+ /* EFX_XWORD_FIELD converts little-endian to CPU */
+ m->hash.rss = EFX_XWORD_FIELD(rx_prefix[0],
ESF_GZ_RX_PREFIX_RSS_HASH);
}
+ if (rxq->flags & SFC_EF100_RXQ_USER_FLAG) {
+ uint32_t user_flag;
+
+ user_flag = EFX_XWORD_FIELD(rx_prefix[0],
+ ESF_GZ_RX_PREFIX_USER_FLAG);
+ if (user_flag != 0)
+ ol_flags |= RTE_MBUF_F_RX_FDIR;
+ }
+
if (rxq->flags & SFC_EF100_RXQ_USER_MARK) {
+ uint8_t tunnel_mark;
uint32_t user_mark;
+ uint32_t mark;
- /* EFX_OWORD_FIELD converts little-endian to CPU */
- user_mark = EFX_OWORD_FIELD(rx_prefix[0],
- ESF_GZ_RX_PREFIX_USER_MARK);
+ /* EFX_XWORD_FIELD converts little-endian to CPU */
+ mark = EFX_XWORD_FIELD(rx_prefix[0],
+ ESF_GZ_RX_PREFIX_USER_MARK);
+
+ user_mark = mark & rxq->user_mark_mask;
if (user_mark != SFC_EF100_USER_MARK_INVALID) {
- ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
+ ol_flags |= RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
m->hash.fdir.hi = user_mark;
}
+
+ tunnel_mark = SFC_FT_GET_TUNNEL_MARK(mark);
+ if (tunnel_mark != SFC_FT_TUNNEL_MARK_INVALID) {
+ sfc_ft_id_t ft_id;
+
+ ft_id = SFC_FT_TUNNEL_MARK_TO_ID(tunnel_mark);
+
+ ol_flags |= sfc_dp_ft_id_valid;
+ *RTE_MBUF_DYNFIELD(m, sfc_dp_ft_id_offset,
+ sfc_ft_id_t *) = ft_id;
+ }
+ }
+
+ if (rxq->flags & SFC_EF100_RXQ_INGRESS_MPORT) {
+ ol_flags |= sfc_dp_mport_override;
+ *RTE_MBUF_DYNFIELD(m,
+ sfc_dp_mport_offset,
+ typeof(&((efx_mport_id_t *)0)->id)) =
+ EFX_XWORD_FIELD(rx_prefix[0],
+ ESF_GZ_RX_PREFIX_INGRESS_MPORT);
}
m->ol_flags = ol_flags;
while (rxq->ready_pkts > 0 && rx_pkts != rx_pkts_end) {
struct rte_mbuf *pkt;
struct rte_mbuf *lastseg;
- const efx_oword_t *rx_prefix;
+ const efx_xword_t *rx_prefix;
uint16_t pkt_len;
uint16_t seg_len;
bool deliver;
pkt->rearm_data[0] = rxq->rearm_data;
/* data_off already moved past Rx prefix */
- rx_prefix = (const efx_oword_t *)sfc_ef100_rx_pkt_prefix(pkt);
+ rx_prefix = (const efx_xword_t *)sfc_ef100_rx_pkt_prefix(pkt);
- pkt_len = EFX_OWORD_FIELD(rx_prefix[0],
+ pkt_len = EFX_XWORD_FIELD(rx_prefix[0],
ESF_GZ_RX_PREFIX_LENGTH);
SFC_ASSERT(pkt_len > 0);
rte_pktmbuf_pkt_len(pkt) = pkt_len;
rxq->max_fill_level = info->max_fill_level;
rxq->refill_threshold = info->refill_threshold;
rxq->prefix_size = info->prefix_size;
+
+ SFC_ASSERT(info->user_mark_mask != 0);
+ rxq->user_mark_mask = info->user_mark_mask;
+
rxq->buf_size = info->buf_size;
rxq->refill_mb_pool = info->refill_mb_pool;
rxq->rxq_hw_ring = info->rxq_hw_ring;
else
rxq->flags &= ~SFC_EF100_RXQ_RSS_HASH;
+ if ((unsup_rx_prefix_fields &
+ (1U << EFX_RX_PREFIX_FIELD_USER_FLAG)) == 0)
+ rxq->flags |= SFC_EF100_RXQ_USER_FLAG;
+ else
+ rxq->flags &= ~SFC_EF100_RXQ_USER_FLAG;
+
if ((unsup_rx_prefix_fields &
(1U << EFX_RX_PREFIX_FIELD_USER_MARK)) == 0)
rxq->flags |= SFC_EF100_RXQ_USER_MARK;
else
rxq->flags &= ~SFC_EF100_RXQ_USER_MARK;
+ if ((unsup_rx_prefix_fields &
+ (1U << EFX_RX_PREFIX_FIELD_INGRESS_MPORT)) == 0)
+ rxq->flags |= SFC_EF100_RXQ_INGRESS_MPORT;
+ else
+ rxq->flags &= ~SFC_EF100_RXQ_INGRESS_MPORT;
+
rxq->prefix_size = pinfo->erpl_length;
rxq->rearm_data = sfc_ef100_mk_mbuf_rearm_data(rxq->dp.dpq.port_id,
rxq->prefix_size);
.hw_fw_caps = SFC_DP_HW_FW_CAP_EF100,
},
.features = SFC_DP_RX_FEAT_MULTI_PROCESS |
+ SFC_DP_RX_FEAT_FLOW_FLAG |
+ SFC_DP_RX_FEAT_FLOW_MARK |
SFC_DP_RX_FEAT_INTR |
SFC_DP_RX_FEAT_STATS,
.dev_offload_capa = 0,
- .queue_offload_capa = DEV_RX_OFFLOAD_CHECKSUM |
- DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
- DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
- DEV_RX_OFFLOAD_SCATTER |
- DEV_RX_OFFLOAD_RSS_HASH,
+ .queue_offload_capa = RTE_ETH_RX_OFFLOAD_CHECKSUM |
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+ RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM |
+ RTE_ETH_RX_OFFLOAD_SCATTER |
+ RTE_ETH_RX_OFFLOAD_RSS_HASH,
.get_dev_info = sfc_ef100_rx_get_dev_info,
.qsize_up_rings = sfc_ef100_rx_qsize_up_rings,
.qcreate = sfc_ef100_rx_qcreate,
git.droids-corp.org / dpdk.git / blobdiff