#include "efx_regs_ef100.h"
#include "efx.h"
+#include "sfc.h"
#include "sfc_debug.h"
+#include "sfc_flow_tunnel.h"
#include "sfc_tweak.h"
#include "sfc_dp_rx.h"
#include "sfc_kvargs.h"
uint64_t rearm_data;
uint16_t buf_size;
uint16_t prefix_size;
+ uint32_t user_mark_mask;
unsigned int evq_hw_index;
volatile void *evq_prime;
}
if (rxq->flags & SFC_EF100_RXQ_USER_MARK) {
+ uint8_t tunnel_mark;
uint32_t user_mark;
+ uint32_t mark;
/* EFX_XWORD_FIELD converts little-endian to CPU */
- user_mark = EFX_XWORD_FIELD(rx_prefix[0],
- ESF_GZ_RX_PREFIX_USER_MARK);
+ mark = EFX_XWORD_FIELD(rx_prefix[0],
+ ESF_GZ_RX_PREFIX_USER_MARK);
+
+ user_mark = mark & rxq->user_mark_mask;
if (user_mark != SFC_EF100_USER_MARK_INVALID) {
ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;
m->hash.fdir.hi = user_mark;
}
+
+ tunnel_mark = SFC_FT_GET_TUNNEL_MARK(mark);
+ if (tunnel_mark != SFC_FT_TUNNEL_MARK_INVALID) {
+ sfc_ft_id_t ft_id;
+
+ ft_id = SFC_FT_TUNNEL_MARK_TO_ID(tunnel_mark);
+
+ ol_flags |= sfc_dp_ft_id_valid;
+ *RTE_MBUF_DYNFIELD(m, sfc_dp_ft_id_offset,
+ sfc_ft_id_t *) = ft_id;
+ }
}
if (rxq->flags & SFC_EF100_RXQ_INGRESS_MPORT) {
rxq->max_fill_level = info->max_fill_level;
rxq->refill_threshold = info->refill_threshold;
rxq->prefix_size = info->prefix_size;
+
+ SFC_ASSERT(info->user_mark_mask != 0);
+ rxq->user_mark_mask = info->user_mark_mask;
+
rxq->buf_size = info->buf_size;
rxq->refill_mb_pool = info->refill_mb_pool;
rxq->rxq_hw_ring = info->rxq_hw_ring;
SFC_DP_RX_FEAT_INTR |
SFC_DP_RX_FEAT_STATS,
.dev_offload_capa = 0,
- .queue_offload_capa = DEV_RX_OFFLOAD_CHECKSUM |
- DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
- DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
- DEV_RX_OFFLOAD_SCATTER |
- DEV_RX_OFFLOAD_RSS_HASH,
+ .queue_offload_capa = RTE_ETH_RX_OFFLOAD_CHECKSUM |
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+ RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM |
+ RTE_ETH_RX_OFFLOAD_SCATTER |
+ RTE_ETH_RX_OFFLOAD_RSS_HASH,
.get_dev_info = sfc_ef100_rx_get_dev_info,
.qsize_up_rings = sfc_ef100_rx_qsize_up_rings,
.qcreate = sfc_ef100_rx_qcreate,