/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright (c) 2016-2018 Solarflare Communications Inc.
- * All rights reserved.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
+ * Copyright(c) 2016-2019 Solarflare Communications Inc.
*
* This software was jointly developed between OKTET Labs (under contract
* for Solarflare) and Solarflare Communications, Inc.
#include "efx_regs.h"
#include "efx_regs_ef10.h"
+#include "sfc_debug.h"
#include "sfc_tweak.h"
#include "sfc_dp_rx.h"
#include "sfc_kvargs.h"
#define sfc_ef10_rx_err(dpq, ...) \
SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, ERR, dpq, __VA_ARGS__)
+#define sfc_ef10_rx_info(dpq, ...) \
+ SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, INFO, dpq, __VA_ARGS__)
+
/**
* Maximum number of descriptors/buffers in the Rx ring.
* It should guarantee that corresponding event queue never overfill.
#define SFC_EF10_RXQ_NOT_RUNNING 0x2
#define SFC_EF10_RXQ_EXCEPTION 0x4
#define SFC_EF10_RXQ_RSS_HASH 0x8
+#define SFC_EF10_RXQ_FLAG_INTR_EN 0x10
unsigned int ptr_mask;
unsigned int pending;
unsigned int completed;
unsigned int evq_read_ptr;
+ unsigned int evq_read_ptr_primed;
efx_qword_t *evq_hw_ring;
struct sfc_ef10_rx_sw_desc *sw_ring;
uint64_t rearm_data;
struct rte_mbuf *scatter_pkt;
+ volatile void *evq_prime;
uint16_t prefix_size;
/* Used on refill */
return container_of(dp_rxq, struct sfc_ef10_rxq, dp);
}
+static void
+sfc_ef10_rx_qprime(struct sfc_ef10_rxq *rxq)
+{
+ sfc_ef10_ev_qprime(rxq->evq_prime, rxq->evq_read_ptr, rxq->ptr_mask);
+ rxq->evq_read_ptr_primed = rxq->evq_read_ptr;
+}
+
static void
sfc_ef10_rx_qrefill(struct sfc_ef10_rxq *rxq)
{
struct sfc_ef10_rx_sw_desc *rxd;
rte_iova_t phys_addr;
- MBUF_RAW_ALLOC_CHECK(m);
+ __rte_mbuf_raw_sanity_check(m);
SFC_ASSERT((id & ~ptr_mask) == 0);
rxd = &rxq->sw_ring[id];
SFC_ASSERT(rxq->added != added);
rxq->added = added;
- sfc_ef10_rx_qpush(rxq->doorbell, added, ptr_mask);
+ sfc_ef10_rx_qpush(rxq->doorbell, added, ptr_mask,
+ &rxq->dp.dpq.rx_dbells);
}
static void
return rx_pkts;
}
+/*
+ * Below Rx pseudo-header (aka Rx prefix) accessors rely on the
+ * following fields layout.
+ */
+static const efx_rx_prefix_layout_t sfc_ef10_rx_prefix_layout = {
+ .erpl_fields = {
+ [EFX_RX_PREFIX_FIELD_RSS_HASH] =
+ { 0, sizeof(uint32_t) * CHAR_BIT, B_FALSE },
+ [EFX_RX_PREFIX_FIELD_LENGTH] =
+ { 8 * CHAR_BIT, sizeof(uint16_t) * CHAR_BIT, B_FALSE },
+ }
+};
static uint16_t
sfc_ef10_rx_pseudo_hdr_get_len(const uint8_t *pseudo_hdr)
{
rxd = &rxq->sw_ring[pending++ & ptr_mask];
m = rxd->mbuf;
- MBUF_RAW_ALLOC_CHECK(m);
+ __rte_mbuf_raw_sanity_check(m);
m->data_off = RTE_PKTMBUF_HEADROOM;
rte_pktmbuf_data_len(m) = seg_len;
/* It is not a problem if we refill in the case of exception */
sfc_ef10_rx_qrefill(rxq);
+ if ((rxq->flags & SFC_EF10_RXQ_FLAG_INTR_EN) &&
+ rxq->evq_read_ptr_primed != rxq->evq_read_ptr)
+ sfc_ef10_rx_qprime(rxq);
+
done:
return nb_pkts - (rx_pkts_end - rx_pkts);
}
static sfc_dp_rx_qdesc_npending_t sfc_ef10_rx_qdesc_npending;
static unsigned int
-sfc_ef10_rx_qdesc_npending(__rte_unused struct sfc_dp_rxq *dp_rxq)
+sfc_ef10_rx_qdesc_npending(struct sfc_dp_rxq *dp_rxq)
{
+ struct sfc_ef10_rxq *rxq = sfc_ef10_rxq_by_dp_rxq(dp_rxq);
+ efx_qword_t rx_ev;
+ const unsigned int evq_old_read_ptr = rxq->evq_read_ptr;
+ unsigned int pending = rxq->pending;
+ unsigned int ready;
+
+ if (unlikely(rxq->flags &
+ (SFC_EF10_RXQ_NOT_RUNNING | SFC_EF10_RXQ_EXCEPTION)))
+ goto done;
+
+ while (sfc_ef10_rx_get_event(rxq, &rx_ev)) {
+ ready = (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_DSC_PTR_LBITS) -
+ pending) &
+ EFX_MASK32(ESF_DZ_RX_DSC_PTR_LBITS);
+ pending += ready;
+ }
+
/*
- * Correct implementation requires EvQ polling and events
- * processing (keeping all ready mbufs in prepared).
+ * The function does not process events, so return event queue read
+ * pointer to the original position to allow the events that were
+ * read to be processed later
*/
- return -ENOTSUP;
+ rxq->evq_read_ptr = evq_old_read_ptr;
+
+done:
+ return pending - rxq->completed;
}
static sfc_dp_rx_qdesc_status_t sfc_ef10_rx_qdesc_status;
static int
-sfc_ef10_rx_qdesc_status(__rte_unused struct sfc_dp_rxq *dp_rxq,
- __rte_unused uint16_t offset)
+sfc_ef10_rx_qdesc_status(struct sfc_dp_rxq *dp_rxq, uint16_t offset)
{
- return -ENOTSUP;
+ struct sfc_ef10_rxq *rxq = sfc_ef10_rxq_by_dp_rxq(dp_rxq);
+ unsigned int npending = sfc_ef10_rx_qdesc_npending(dp_rxq);
+
+ if (unlikely(offset > rxq->ptr_mask))
+ return -EINVAL;
+
+ if (offset < npending)
+ return RTE_ETH_RX_DESC_DONE;
+
+ if (offset < (rxq->added - rxq->completed))
+ return RTE_ETH_RX_DESC_AVAIL;
+
+ return RTE_ETH_RX_DESC_UNAVAIL;
}
static sfc_dp_rx_qsize_up_rings_t sfc_ef10_rx_qsize_up_rings;
static int
sfc_ef10_rx_qsize_up_rings(uint16_t nb_rx_desc,
+ struct sfc_dp_rx_hw_limits *limits,
__rte_unused struct rte_mempool *mb_pool,
unsigned int *rxq_entries,
unsigned int *evq_entries,
* rte_ethdev API guarantees that the number meets min, max and
* alignment requirements.
*/
- if (nb_rx_desc <= EFX_RXQ_MINNDESCS)
- *rxq_entries = EFX_RXQ_MINNDESCS;
+ if (nb_rx_desc <= limits->rxq_min_entries)
+ *rxq_entries = limits->rxq_min_entries;
else
*rxq_entries = rte_align32pow2(nb_rx_desc);
rxq->doorbell = (volatile uint8_t *)info->mem_bar +
ER_DZ_RX_DESC_UPD_REG_OFST +
(info->hw_index << info->vi_window_shift);
+ rxq->evq_prime = (volatile uint8_t *)info->mem_bar +
+ ER_DZ_EVQ_RPTR_REG_OFST +
+ (info->evq_hw_index << info->vi_window_shift);
+
+ sfc_ef10_rx_info(&rxq->dp.dpq, "RxQ doorbell is %p", rxq->doorbell);
*dp_rxqp = &rxq->dp;
return 0;
static sfc_dp_rx_qstart_t sfc_ef10_rx_qstart;
static int
-sfc_ef10_rx_qstart(struct sfc_dp_rxq *dp_rxq, unsigned int evq_read_ptr)
+sfc_ef10_rx_qstart(struct sfc_dp_rxq *dp_rxq, unsigned int evq_read_ptr,
+ const efx_rx_prefix_layout_t *pinfo)
{
struct sfc_ef10_rxq *rxq = sfc_ef10_rxq_by_dp_rxq(dp_rxq);
SFC_ASSERT(rxq->pending == 0);
SFC_ASSERT(rxq->added == 0);
+ if (pinfo->erpl_length != rxq->prefix_size ||
+ efx_rx_prefix_layout_check(pinfo, &sfc_ef10_rx_prefix_layout) != 0)
+ return ENOTSUP;
+
sfc_ef10_rx_qrefill(rxq);
rxq->evq_read_ptr = evq_read_ptr;
rxq->flags |= SFC_EF10_RXQ_STARTED;
rxq->flags &= ~(SFC_EF10_RXQ_NOT_RUNNING | SFC_EF10_RXQ_EXCEPTION);
+ if (rxq->flags & SFC_EF10_RXQ_FLAG_INTR_EN)
+ sfc_ef10_rx_qprime(rxq);
+
return 0;
}
rxq->flags &= ~SFC_EF10_RXQ_STARTED;
}
+static sfc_dp_rx_intr_enable_t sfc_ef10_rx_intr_enable;
+static int
+sfc_ef10_rx_intr_enable(struct sfc_dp_rxq *dp_rxq)
+{
+ struct sfc_ef10_rxq *rxq = sfc_ef10_rxq_by_dp_rxq(dp_rxq);
+
+ rxq->flags |= SFC_EF10_RXQ_FLAG_INTR_EN;
+ if (rxq->flags & SFC_EF10_RXQ_STARTED)
+ sfc_ef10_rx_qprime(rxq);
+ return 0;
+}
+
+static sfc_dp_rx_intr_disable_t sfc_ef10_rx_intr_disable;
+static int
+sfc_ef10_rx_intr_disable(struct sfc_dp_rxq *dp_rxq)
+{
+ struct sfc_ef10_rxq *rxq = sfc_ef10_rxq_by_dp_rxq(dp_rxq);
+
+ /* Cannot disarm, just disable rearm */
+ rxq->flags &= ~SFC_EF10_RXQ_FLAG_INTR_EN;
+ return 0;
+}
+
struct sfc_dp_rx sfc_ef10_rx = {
.dp = {
.name = SFC_KVARG_DATAPATH_EF10,
.type = SFC_DP_RX,
.hw_fw_caps = SFC_DP_HW_FW_CAP_EF10,
},
- .features = SFC_DP_RX_FEAT_SCATTER |
- SFC_DP_RX_FEAT_MULTI_PROCESS |
- SFC_DP_RX_FEAT_TUNNELS |
- SFC_DP_RX_FEAT_CHECKSUM,
+ .features = SFC_DP_RX_FEAT_MULTI_PROCESS |
+ SFC_DP_RX_FEAT_INTR,
+ .dev_offload_capa = RTE_ETH_RX_OFFLOAD_CHECKSUM |
+ RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+ RTE_ETH_RX_OFFLOAD_RSS_HASH,
+ .queue_offload_capa = RTE_ETH_RX_OFFLOAD_SCATTER,
.get_dev_info = sfc_ef10_rx_get_dev_info,
.qsize_up_rings = sfc_ef10_rx_qsize_up_rings,
.qcreate = sfc_ef10_rx_qcreate,
.supported_ptypes_get = sfc_ef10_supported_ptypes_get,
.qdesc_npending = sfc_ef10_rx_qdesc_npending,
.qdesc_status = sfc_ef10_rx_qdesc_status,
+ .intr_enable = sfc_ef10_rx_intr_enable,
+ .intr_disable = sfc_ef10_rx_intr_disable,
.pkt_burst = sfc_ef10_recv_pkts,
};
git.droids-corp.org / dpdk.git / blobdiff