-/*-
- * BSD LICENSE
+/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright (c) 2016-2017 Solarflare Communications Inc.
+ * Copyright (c) 2016-2018 Solarflare Communications Inc.
* All rights reserved.
*
* This software was jointly developed between OKTET Labs (under contract
* for Solarflare) and Solarflare Communications, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <rte_dev.h>
-#include <rte_ethdev.h>
+#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
#include <rte_pci.h>
#include <rte_bus_pci.h>
{
struct sfc_adapter *sa = dev->data->dev_private;
const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
+ uint64_t txq_offloads_def = 0;
sfc_log_init(sa, "entry");
/* By default packets are dropped if no descriptors are available */
dev_info->default_rxconf.rx_drop_en = 1;
- dev_info->rx_offload_capa =
- DEV_RX_OFFLOAD_IPV4_CKSUM |
- DEV_RX_OFFLOAD_UDP_CKSUM |
- DEV_RX_OFFLOAD_TCP_CKSUM;
+ dev_info->rx_queue_offload_capa = sfc_rx_get_queue_offload_caps(sa);
+
+ /*
+ * rx_offload_capa includes both device and queue offloads since
+ * the latter may be requested on a per device basis which makes
+ * sense when some offloads are needed to be set on all queues.
+ */
+ dev_info->rx_offload_capa = sfc_rx_get_dev_offload_caps(sa) |
+ dev_info->rx_queue_offload_capa;
- if ((encp->enc_tunnel_encapsulations_supported != 0) &&
- (sa->dp_rx->features & SFC_DP_RX_FEAT_TUNNELS))
- dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
+ dev_info->tx_queue_offload_capa = sfc_tx_get_queue_offload_caps(sa);
+
+ /*
+ * tx_offload_capa includes both device and queue offloads since
+ * the latter may be requested on a per device basis which makes
+ * sense when some offloads are needed to be set on all queues.
+ */
+ dev_info->tx_offload_capa = sfc_tx_get_dev_offload_caps(sa) |
+ dev_info->tx_queue_offload_capa;
- dev_info->tx_offload_capa =
- DEV_TX_OFFLOAD_IPV4_CKSUM |
- DEV_TX_OFFLOAD_UDP_CKSUM |
- DEV_TX_OFFLOAD_TCP_CKSUM;
+ if (dev_info->tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
+ txq_offloads_def |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
- if (encp->enc_tunnel_encapsulations_supported != 0)
- dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
+ dev_info->default_txconf.offloads |= txq_offloads_def;
dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) ||
!encp->enc_hw_tx_insert_vlan_enabled)
dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
- else
- dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG)
dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
}
#endif
- if (sa->tso)
- dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
-
+ /* Initialize to hardware limits */
dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
/* The RXQ hardware requires that the descriptor count is a power
*/
dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
+ /* Initialize to hardware limits */
dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
/*
* of 2, but tx_desc_lim cannot properly describe that constraint
*/
dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
+
+ if (sa->dp_rx->get_dev_info != NULL)
+ sa->dp_rx->get_dev_info(dev_info);
+ if (sa->dp_tx->get_dev_info != NULL)
+ sa->dp_tx->get_dev_info(dev_info);
}
static const uint32_t *
* The driver does not use it, but other PMDs update jumbo_frame
* flag and max_rx_pkt_len when MTU is set.
*/
- dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
+ if (mtu > ETHER_MAX_LEN) {
+ struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
+
+ rxmode->offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
+ rxmode->jumbo_frame = 1;
+ }
+
dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
sfc_adapter_unlock(sa);
qinfo->conf.rx_free_thresh = rxq->refill_threshold;
qinfo->conf.rx_drop_en = 1;
qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
- qinfo->scattered_rx =
- ((rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) != 0);
+ qinfo->conf.offloads = DEV_RX_OFFLOAD_IPV4_CKSUM |
+ DEV_RX_OFFLOAD_UDP_CKSUM |
+ DEV_RX_OFFLOAD_TCP_CKSUM;
+ if (rxq_info->type_flags & EFX_RXQ_FLAG_SCATTER) {
+ qinfo->conf.offloads |= DEV_RX_OFFLOAD_SCATTER;
+ qinfo->scattered_rx = 1;
+ }
qinfo->nb_desc = rxq_info->entries;
sfc_adapter_unlock(sa);
memset(qinfo, 0, sizeof(*qinfo));
qinfo->conf.txq_flags = txq_info->txq->flags;
+ qinfo->conf.offloads = txq_info->txq->offloads;
qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
qinfo->conf.tx_deferred_start = txq_info->deferred_start;
qinfo->nb_desc = txq_info->entries;
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