}
if (priv->configured)
ret |= mlx5_vdpa_lm_log(priv);
+ mlx5_vdpa_err_event_unset(priv);
mlx5_vdpa_cqe_event_unset(priv);
mlx5_vdpa_steer_unset(priv);
mlx5_vdpa_virtqs_release(priv);
DRV_LOG(WARNING, "MTU cannot be set on device %s.",
vdev->device->name);
if (mlx5_vdpa_pd_create(priv) || mlx5_vdpa_mem_register(priv) ||
+ mlx5_vdpa_err_event_setup(priv) ||
mlx5_vdpa_virtqs_prepare(priv) || mlx5_vdpa_steer_setup(priv) ||
mlx5_vdpa_cqe_event_setup(priv)) {
mlx5_vdpa_dev_close(vid);
{
struct mlx5_vdpa_priv *priv = opaque;
unsigned long tmp;
+ int n_cores = sysconf(_SC_NPROCESSORS_ONLN);
if (strcmp(key, "class") == 0)
return 0;
priv->event_us = (uint32_t)tmp;
} else if (strcmp(key, "no_traffic_time") == 0) {
priv->no_traffic_time_s = (uint32_t)tmp;
+ } else if (strcmp(key, "event_core") == 0) {
+ if (tmp >= (unsigned long)n_cores)
+ DRV_LOG(WARNING, "Invalid event_core %s.", val);
+ else
+ priv->event_core = tmp;
} else {
DRV_LOG(WARNING, "Invalid key %s.", key);
}
{
struct rte_kvargs *kvlist;
- priv->event_mode = MLX5_VDPA_EVENT_MODE_DYNAMIC_TIMER;
+ priv->event_mode = MLX5_VDPA_EVENT_MODE_FIXED_TIMER;
priv->event_us = 0;
+ priv->event_core = -1;
priv->no_traffic_time_s = MLX5_VDPA_DEFAULT_NO_TRAFFIC_TIME_S;
if (devargs == NULL)
return;
return;
rte_kvargs_process(kvlist, NULL, mlx5_vdpa_args_check_handler, priv);
rte_kvargs_free(kvlist);
- if (!priv->event_us) {
- if (priv->event_mode == MLX5_VDPA_EVENT_MODE_DYNAMIC_TIMER)
- priv->event_us = MLX5_VDPA_DEFAULT_TIMER_STEP_US;
- else if (priv->event_mode == MLX5_VDPA_EVENT_MODE_FIXED_TIMER)
- priv->event_us = MLX5_VDPA_DEFAULT_TIMER_DELAY_US;
- }
+ if (!priv->event_us &&
+ priv->event_mode == MLX5_VDPA_EVENT_MODE_DYNAMIC_TIMER)
+ priv->event_us = MLX5_VDPA_DEFAULT_TIMER_STEP_US;
DRV_LOG(DEBUG, "event mode is %d.", priv->event_mode);
DRV_LOG(DEBUG, "event_us is %u us.", priv->event_us);
DRV_LOG(DEBUG, "no traffic time is %u s.", priv->no_traffic_time_s);
}
priv->caps = attr.vdpa;
priv->log_max_rqt_size = attr.log_max_rqt_size;
+ priv->num_lag_ports = attr.num_lag_ports;
+ if (attr.num_lag_ports == 0)
+ priv->num_lag_ports = 1;
priv->ctx = ctx;
priv->pci_dev = pci_dev;
priv->var = mlx5_glue->dv_alloc_var(ctx, 0);
},
{
RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
- PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
+ PCI_DEVICE_ID_MELLANOX_CONNECTXVF)
},
{
RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,