#undef RTE_TX_OFFLOAD_BIT2STR
+static const struct {
+ uint64_t offload;
+ const char *name;
+} rte_eth_dev_capa_names[] = {
+ {RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP, "RUNTIME_RX_QUEUE_SETUP"},
+ {RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP, "RUNTIME_TX_QUEUE_SETUP"},
+ {RTE_ETH_DEV_CAPA_RXQ_SHARE, "RXQ_SHARE"},
+};
+
/**
* The user application callback description.
*
/*
* Attach to a port already registered by the primary process, which
- * makes sure that the same device would have the same port id both
+ * makes sure that the same device would have the same port ID both
* in the primary and secondary process.
*/
struct rte_eth_dev *
struct rte_eth_dev_owner *port_owner;
if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
- RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
+ RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
port_id);
return -ENODEV;
}
owner_id);
} else {
RTE_ETHDEV_LOG(ERR,
- "Invalid owner id=%016"PRIx64"\n",
+ "Invalid owner ID=%016"PRIx64"\n",
owner_id);
ret = -EINVAL;
}
ethdev = &rte_eth_devices[port_id];
if (!eth_dev_is_allocated(ethdev)) {
- RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
+ RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
port_id);
return -ENODEV;
}
return name;
}
+const char *
+rte_eth_dev_capability_name(uint64_t capability)
+{
+ const char *name = "UNKNOWN";
+ unsigned int i;
+
+ for (i = 0; i < RTE_DIM(rte_eth_dev_capa_names); ++i) {
+ if (capability == rte_eth_dev_capa_names[i].offload) {
+ name = rte_eth_dev_capa_names[i].name;
+ break;
+ }
+ }
+
+ return name;
+}
+
static inline int
eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
uint32_t max_rx_pkt_len, uint32_t dev_info_size)
return -EINVAL;
}
+ if (local_conf.share_group > 0 &&
+ (dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) == 0) {
+ RTE_ETHDEV_LOG(ERR,
+ "Ethdev port_id=%d rx_queue_id=%d, enabled share_group=%hu while device doesn't support Rx queue share\n",
+ port_id, rx_queue_id, local_conf.share_group);
+ return -EINVAL;
+ }
+
/*
* If LRO is enabled, check that the maximum aggregated packet
* size is supported by the configured device.
return ret;
}
+ if (dev->data->dev_configured == 0) {
+ RTE_ETHDEV_LOG(ERR,
+ "Port %u must be configured before MTU set\n",
+ port_id);
+ return -EINVAL;
+ }
+
ret = (*dev->dev_ops->mtu_set)(dev, mtu);
if (ret == 0)
dev->data->mtu = mtu;
if (!(dev->data->dev_conf.rxmode.offloads &
DEV_RX_OFFLOAD_VLAN_FILTER)) {
- RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
+ RTE_ETHDEV_LOG(ERR, "Port %u: VLAN-filtering disabled\n",
port_id);
return -ENOSYS;
}
return -EINVAL;
}
if (pool >= ETH_64_POOLS) {
- RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
+ RTE_ETHDEV_LOG(ERR, "Pool ID must be 0-%d\n", ETH_64_POOLS - 1);
return -EINVAL;
}
if (queue_idx > dev_info.max_tx_queues) {
RTE_ETHDEV_LOG(ERR,
- "Set queue rate limit:port %u: invalid queue id=%u\n",
+ "Set queue rate limit:port %u: invalid queue ID=%u\n",
port_id, queue_idx);
return -EINVAL;
}
if (dev->data->dev_configured != 0) {
RTE_ETHDEV_LOG(ERR,
- "The port (id=%"PRIu16") is already configured\n",
+ "The port (ID=%"PRIu16") is already configured\n",
port_id);
return -EBUSY;
}