#endif
#include <stdint.h>
+#include <rte_cpuflags.h>
+#include <rte_branch_prediction.h>
+#include <rte_common.h>
/* Lookup tables for software implementation of CRC32C */
static const uint32_t crc32c_tables[8][256] = {{
(crc32c_tables[(n)][(crc) & 0xFF] ^ \
crc32c_tables[(n)-1][((crc) >> 8) & 0xFF])
+static inline uint32_t
+crc32c_1byte(uint8_t data, uint32_t init_val)
+{
+ uint32_t crc;
+ crc = init_val;
+ crc ^= data;
+
+ return crc32c_tables[0][crc & 0xff] ^ (crc >> 8);
+}
+
+static inline uint32_t
+crc32c_2bytes(uint16_t data, uint32_t init_val)
+{
+ uint32_t crc;
+ crc = init_val;
+ crc ^= data;
+
+ crc = CRC32_UPD(crc, 1) ^ (crc >> 16);
+
+ return crc;
+}
+
static inline uint32_t
crc32c_1word(uint32_t data, uint32_t init_val)
{
return crc;
}
+#if defined(RTE_ARCH_X86)
static inline uint32_t
-crc32c_sse42_u32(uint32_t data, uint32_t init_val)
+crc32c_sse42_u8(uint8_t data, uint32_t init_val)
{
__asm__ volatile(
- "crc32l %[data], %[init_val];"
+ "crc32b %[data], %[init_val];"
: [init_val] "+r" (init_val)
: [data] "rm" (data));
return init_val;
}
static inline uint32_t
-crc32c_sse42_u64(uint64_t data, uint64_t init_val)
+crc32c_sse42_u16(uint16_t data, uint32_t init_val)
{
__asm__ volatile(
- "crc32q %[data], %[init_val];"
+ "crc32w %[data], %[init_val];"
+ : [init_val] "+r" (init_val)
+ : [data] "rm" (data));
+ return init_val;
+}
+
+static inline uint32_t
+crc32c_sse42_u32(uint32_t data, uint32_t init_val)
+{
+ __asm__ volatile(
+ "crc32l %[data], %[init_val];"
: [init_val] "+r" (init_val)
: [data] "rm" (data));
return init_val;
init_val = crc32c_sse42_u32(d.u32[1], init_val);
return init_val;
}
+#endif
+
+#ifdef RTE_ARCH_X86_64
+static inline uint32_t
+crc32c_sse42_u64(uint64_t data, uint64_t init_val)
+{
+ __asm__ volatile(
+ "crc32q %[data], %[init_val];"
+ : [init_val] "+r" (init_val)
+ : [data] "rm" (data));
+ return init_val;
+}
+#endif
+
+#define CRC32_SW (1U << 0)
+#define CRC32_SSE42 (1U << 1)
+#define CRC32_x64 (1U << 2)
+#define CRC32_SSE42_x64 (CRC32_x64|CRC32_SSE42)
+#define CRC32_ARM64 (1U << 3)
+
+static uint8_t crc32_alg = CRC32_SW;
+
+#if defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_CRC32)
+#include "rte_crc_arm64.h"
+#else
+
+/**
+ * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash
+ * calculation.
+ *
+ * @param alg
+ * An OR of following flags:
+ * - (CRC32_SW) Don't use SSE4.2 intrinsics
+ * - (CRC32_SSE42) Use SSE4.2 intrinsics if available
+ * - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default)
+ *
+ */
+static inline void
+rte_hash_crc_set_alg(uint8_t alg)
+{
+#if defined(RTE_ARCH_X86)
+ if (alg == CRC32_SSE42_x64 &&
+ !rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
+ alg = CRC32_SSE42;
+#endif
+ crc32_alg = alg;
+}
+
+/* Setting the best available algorithm */
+static inline void __attribute__((constructor))
+rte_hash_crc_init_alg(void)
+{
+ rte_hash_crc_set_alg(CRC32_SSE42_x64);
+}
+
+/**
+ * Use single crc32 instruction to perform a hash on a byte value.
+ * Fall back to software crc32 implementation in case SSE4.2 is
+ * not supported
+ *
+ * @param data
+ * Data to perform hash on.
+ * @param init_val
+ * Value to initialise hash generator.
+ * @return
+ * 32bit calculated hash value.
+ */
+static inline uint32_t
+rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
+{
+#if defined RTE_ARCH_X86
+ if (likely(crc32_alg & CRC32_SSE42))
+ return crc32c_sse42_u8(data, init_val);
+#endif
+
+ return crc32c_1byte(data, init_val);
+}
+
+/**
+ * Use single crc32 instruction to perform a hash on a 2 bytes value.
+ * Fall back to software crc32 implementation in case SSE4.2 is
+ * not supported
+ *
+ * @param data
+ * Data to perform hash on.
+ * @param init_val
+ * Value to initialise hash generator.
+ * @return
+ * 32bit calculated hash value.
+ */
+static inline uint32_t
+rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
+{
+#if defined RTE_ARCH_X86
+ if (likely(crc32_alg & CRC32_SSE42))
+ return crc32c_sse42_u16(data, init_val);
+#endif
+
+ return crc32c_2bytes(data, init_val);
+}
/**
* Use single crc32 instruction to perform a hash on a 4 byte value.
+ * Fall back to software crc32 implementation in case SSE4.2 is
+ * not supported
*
* @param data
* Data to perform hash on.
static inline uint32_t
rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
{
- return crc32c_sse42_u32(data, init_val);
+#if defined RTE_ARCH_X86
+ if (likely(crc32_alg & CRC32_SSE42))
+ return crc32c_sse42_u32(data, init_val);
+#endif
+
+ return crc32c_1word(data, init_val);
}
/**
* Use single crc32 instruction to perform a hash on a 8 byte value.
+ * Fall back to software crc32 implementation in case SSE4.2 is
+ * not supported
*
* @param data
* Data to perform hash on.
static inline uint32_t
rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
{
- return crc32c_sse42_u64(data, init_val);
+#ifdef RTE_ARCH_X86_64
+ if (likely(crc32_alg == CRC32_SSE42_x64))
+ return crc32c_sse42_u64(data, init_val);
+#endif
+
+#if defined RTE_ARCH_X86
+ if (likely(crc32_alg & CRC32_SSE42))
+ return crc32c_sse42_u64_mimic(data, init_val);
+#endif
+
+ return crc32c_2words(data, init_val);
}
+#endif
+
/**
- * Use crc32 instruction to perform a hash.
+ * Calculate CRC32 hash on user-supplied byte array.
*
* @param data
* Data to perform hash on.
rte_hash_crc(const void *data, uint32_t data_len, uint32_t init_val)
{
unsigned i;
- uint32_t temp = 0;
- const uint32_t *p32 = (const uint32_t *)data;
+ uintptr_t pd = (uintptr_t) data;
- for (i = 0; i < data_len / 4; i++) {
- init_val = rte_hash_crc_4byte(*p32++, init_val);
+ for (i = 0; i < data_len / 8; i++) {
+ init_val = rte_hash_crc_8byte(*(const uint64_t *)pd, init_val);
+ pd += 8;
}
- switch (3 - (data_len & 0x03)) {
- case 0:
- temp |= *((const uint8_t *)p32 + 2) << 16;
- /* Fallthrough */
- case 1:
- temp |= *((const uint8_t *)p32 + 1) << 8;
- /* Fallthrough */
- case 2:
- temp |= *((const uint8_t *)p32);
- init_val = rte_hash_crc_4byte(temp, init_val);
- default:
- break;
+ if (data_len & 0x4) {
+ init_val = rte_hash_crc_4byte(*(const uint32_t *)pd, init_val);
+ pd += 4;
}
+ if (data_len & 0x2) {
+ init_val = rte_hash_crc_2byte(*(const uint16_t *)pd, init_val);
+ pd += 2;
+ }
+
+ if (data_len & 0x1)
+ init_val = rte_hash_crc_1byte(*(const uint8_t *)pd, init_val);
+
return init_val;
}
git.droids-corp.org / dpdk.git / blobdiff