/*-
* BSD LICENSE
*
- * Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
+ * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
uint16_t tx_last;
uint16_t nb_tx;
uint16_t tx_ol_req;
- uint32_t new_ctx;
- uint32_t ctx;
+ uint32_t new_ctx = 0;
+ uint32_t ctx = 0;
uint32_t vlan_macip_lens;
txq = tx_queue;
txq->tx_ring_phys_addr = (uint64_t) tz->phys_addr;
txq->tx_ring = (union e1000_adv_tx_desc *) tz->addr;
- size = sizeof(union e1000_adv_tx_desc) * nb_desc;
-
/* Allocate software ring */
txq->sw_ring = rte_zmalloc("txq->sw_ring",
sizeof(struct igb_tx_entry) * nb_desc,
if (dev->data->dev_conf.rxmode.hw_strip_crc) {
rctl |= E1000_RCTL_SECRC; /* Strip Ethernet CRC. */
- /* set STRCRC bit in all queues for Powerville */
- if (hw->mac.type == e1000_i350) {
+ /* set STRCRC bit in all queues for Powerville/Springville */
+ if (hw->mac.type == e1000_i350 || hw->mac.type == e1000_i210) {
for (i = 0; i < dev->data->nb_rx_queues; i++) {
uint32_t dvmolr = E1000_READ_REG(hw,
E1000_DVMOLR(i));
} else {
rctl &= ~E1000_RCTL_SECRC; /* Do not Strip Ethernet CRC. */
- /* clear STRCRC bit in all queues for Powerville */
- if (hw->mac.type == e1000_i350) {
+ /* clear STRCRC bit in all queues for Powerville/Springville */
+ if (hw->mac.type == e1000_i350 || hw->mac.type == e1000_i210) {
for (i = 0; i < dev->data->nb_rx_queues; i++) {
uint32_t dvmolr = E1000_READ_REG(hw,
E1000_DVMOLR(i));