Atomic functions are described in doxygen of the file
lib/librte_eal/common/include/generic/rte_atomic.h
The copies in arch-specific files are redundant
and confuse readers about the genericity of the API.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
#include "generic/rte_atomic.h"
#include "generic/rte_atomic.h"
-/**
- * General memory barrier.
- *
- * Guarantees that the LOAD and STORE operations generated before the
- * barrier occur before the LOAD and STORE operations generated after.
- */
#define rte_mb() __sync_synchronize()
#define rte_mb() __sync_synchronize()
-/**
- * Write memory barrier.
- *
- * Guarantees that the STORE operations generated before the barrier
- * occur before the STORE operations generated after.
- */
#define rte_wmb() do { asm volatile ("dmb st" : : : "memory"); } while (0)
#define rte_wmb() do { asm volatile ("dmb st" : : : "memory"); } while (0)
-/**
- * Read memory barrier.
- *
- * Guarantees that the LOAD operations generated before the barrier
- * occur before the LOAD operations generated after.
- */
#define rte_rmb() __sync_synchronize()
#define rte_smp_mb() rte_mb()
#define rte_rmb() __sync_synchronize()
#define rte_smp_mb() rte_mb()
#include <stdint.h>
#include "generic/rte_atomic.h"
#include <stdint.h>
#include "generic/rte_atomic.h"
-/**
- * General memory barrier.
- *
- * Guarantees that the LOAD and STORE operations generated before the
- * barrier occur before the LOAD and STORE operations generated after.
- */
#define rte_mb() asm volatile("sync" : : : "memory")
#define rte_mb() asm volatile("sync" : : : "memory")
-/**
- * Write memory barrier.
- *
- * Guarantees that the STORE operations generated before the barrier
- * occur before the STORE operations generated after.
- */
#define rte_wmb() asm volatile("sync" : : : "memory")
#define rte_wmb() asm volatile("sync" : : : "memory")
-/**
- * Read memory barrier.
- *
- * Guarantees that the LOAD operations generated before the barrier
- * occur before the LOAD operations generated after.
- */
#define rte_rmb() asm volatile("sync" : : : "memory")
#define rte_smp_mb() rte_mb()
#define rte_rmb() asm volatile("sync" : : : "memory")
#define rte_smp_mb() rte_mb()
*
* Guarantees that the LOAD and STORE operations generated before the
* barrier occur before the LOAD and STORE operations generated after.
*
* Guarantees that the LOAD and STORE operations generated before the
* barrier occur before the LOAD and STORE operations generated after.
- * This function is architecture dependent.
*/
static inline void rte_mb(void);
*/
static inline void rte_mb(void);
*
* Guarantees that the STORE operations generated before the barrier
* occur before the STORE operations generated after.
*
* Guarantees that the STORE operations generated before the barrier
* occur before the STORE operations generated after.
- * This function is architecture dependent.
*/
static inline void rte_wmb(void);
*/
static inline void rte_wmb(void);
*
* Guarantees that the LOAD operations generated before the barrier
* occur before the LOAD operations generated after.
*
* Guarantees that the LOAD operations generated before the barrier
* occur before the LOAD operations generated after.
- * This function is architecture dependent.
*/
static inline void rte_rmb(void);
///@}
*/
static inline void rte_rmb(void);
///@}