+/* LINK speed types */
+enum eth_link_speed {
+ ETH_LINK_NONE,
+ ETH_LINK_10M,
+ ETH_LINK_100M,
+ ETH_LINK_1G,
+ ETH_LINK_2HG, /* 2.5 Gbps */
+ ETH_LINK_5G,
+ ETH_LINK_10G,
+ ETH_LINK_20G,
+ ETH_LINK_25G,
+ ETH_LINK_40G,
+ ETH_LINK_50G,
+ ETH_LINK_80G,
+ ETH_LINK_100G,
+ ETH_LINK_MAX,
+};
+
+/* Supported LINK MODE enums
+ * Each link mode is a bit mask of these
+ * enums which are represented as bits
+ */
+enum eth_mode {
+ ETH_MODE_SGMII_BIT = 0,
+ ETH_MODE_1000_BASEX_BIT,
+ ETH_MODE_QSGMII_BIT,
+ ETH_MODE_10G_C2C_BIT,
+ ETH_MODE_10G_C2M_BIT,
+ ETH_MODE_10G_KR_BIT, /* = 5 */
+ ETH_MODE_20G_C2C_BIT,
+ ETH_MODE_25G_C2C_BIT,
+ ETH_MODE_25G_C2M_BIT,
+ ETH_MODE_25G_2_C2C_BIT,
+ ETH_MODE_25G_CR_BIT, /* = 10 */
+ ETH_MODE_25G_KR_BIT,
+ ETH_MODE_40G_C2C_BIT,
+ ETH_MODE_40G_C2M_BIT,
+ ETH_MODE_40G_CR4_BIT,
+ ETH_MODE_40G_KR4_BIT, /* = 15 */
+ ETH_MODE_40GAUI_C2C_BIT,
+ ETH_MODE_50G_C2C_BIT,
+ ETH_MODE_50G_C2M_BIT,
+ ETH_MODE_50G_4_C2C_BIT,
+ ETH_MODE_50G_CR_BIT, /* = 20 */
+ ETH_MODE_50G_KR_BIT,
+ ETH_MODE_80GAUI_C2C_BIT,
+ ETH_MODE_100G_C2C_BIT,
+ ETH_MODE_100G_C2M_BIT,
+ ETH_MODE_100G_CR4_BIT, /* = 25 */
+ ETH_MODE_100G_KR4_BIT,
+ ETH_MODE_MAX_BIT /* = 27 */
+};
+