Allocate maximum supported hardware ring hardware descriptors
memory on the first rte_eth_dma_zone_reserve call in order to
get sufficient hardware ring buffer space on subsequent queue
setup request with different queue size.
Fixes:
aa0d976e501d ("net/thunderx: add Rx queue setup and release")
Fixes:
3f3c6f9724a8 ("net/thunderx: add Tx queue setup and release")
Fixes:
7413feee662d ("net/thunderx: add device start/stop and close")
Signed-off-by: Kamil Rytarowski <kamil.rytarowski@caviumnetworks.com>
Signed-off-by: Zyta Szpak <zyta.szpak@semihalf.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
#define RBDR_QUEUE_SZ_128K (128 * 1024)
#define RBDR_QUEUE_SZ_256K (256 * 1024)
#define RBDR_QUEUE_SZ_512K (512 * 1024)
#define RBDR_QUEUE_SZ_128K (128 * 1024)
#define RBDR_QUEUE_SZ_256K (256 * 1024)
#define RBDR_QUEUE_SZ_512K (512 * 1024)
+#define RBDR_QUEUE_SZ_MAX RBDR_QUEUE_SZ_512K
#define RBDR_SIZE_SHIFT (13) /* 8k */
#define RBDR_SIZE_SHIFT (13) /* 8k */
#define SND_QUEUE_SZ_16K (16 * 1024)
#define SND_QUEUE_SZ_32K (32 * 1024)
#define SND_QUEUE_SZ_64K (64 * 1024)
#define SND_QUEUE_SZ_16K (16 * 1024)
#define SND_QUEUE_SZ_32K (32 * 1024)
#define SND_QUEUE_SZ_64K (64 * 1024)
+#define SND_QUEUE_SZ_MAX SND_QUEUE_SZ_64K
#define SND_QSIZE_SHIFT (10) /* 1k */
#define SND_QSIZE_SHIFT (10) /* 1k */
#define CMP_QUEUE_SZ_16K (16 * 1024)
#define CMP_QUEUE_SZ_32K (32 * 1024)
#define CMP_QUEUE_SZ_64K (64 * 1024)
#define CMP_QUEUE_SZ_16K (16 * 1024)
#define CMP_QUEUE_SZ_32K (32 * 1024)
#define CMP_QUEUE_SZ_64K (64 * 1024)
+#define CMP_QUEUE_SZ_MAX CMP_QUEUE_SZ_64K
#define CMP_QSIZE_SHIFT (10) /* 1k */
#define CMP_QSIZE_SHIFT (10) /* 1k */
uint32_t desc_cnt)
{
const struct rte_memzone *rz;
uint32_t desc_cnt)
{
const struct rte_memzone *rz;
- uint32_t ring_size = desc_cnt * sizeof(union cq_entry_t);
+ uint32_t ring_size = CMP_QUEUE_SZ_MAX * sizeof(union cq_entry_t);
rz = rte_eth_dma_zone_reserve(nic->eth_dev, "cq_ring", qidx, ring_size,
NICVF_CQ_BASE_ALIGN_BYTES, nic->node);
rz = rte_eth_dma_zone_reserve(nic->eth_dev, "cq_ring", qidx, ring_size,
NICVF_CQ_BASE_ALIGN_BYTES, nic->node);
uint32_t desc_cnt)
{
const struct rte_memzone *rz;
uint32_t desc_cnt)
{
const struct rte_memzone *rz;
- uint32_t ring_size = desc_cnt * sizeof(union sq_entry_t);
+ uint32_t ring_size = SND_QUEUE_SZ_MAX * sizeof(union sq_entry_t);
rz = rte_eth_dma_zone_reserve(nic->eth_dev, "sq", qidx, ring_size,
NICVF_SQ_BASE_ALIGN_BYTES, nic->node);
rz = rte_eth_dma_zone_reserve(nic->eth_dev, "sq", qidx, ring_size,
NICVF_SQ_BASE_ALIGN_BYTES, nic->node);
- ring_size = sizeof(struct rbdr_entry_t) * desc_cnt;
+ ring_size = sizeof(struct rbdr_entry_t) * RBDR_QUEUE_SZ_MAX;
rz = rte_eth_dma_zone_reserve(nic->eth_dev, "rbdr", 0, ring_size,
NICVF_RBDR_BASE_ALIGN_BYTES, nic->node);
if (rz == NULL) {
rz = rte_eth_dma_zone_reserve(nic->eth_dev, "rbdr", 0, ring_size,
NICVF_RBDR_BASE_ALIGN_BYTES, nic->node);
if (rz == NULL) {