net/mlx5: fix UAR remap initialization for 32-bit systems
authorViacheslav Ovsiienko <viacheslavo@mellanox.com>
Wed, 18 Sep 2019 06:54:11 +0000 (06:54 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 7 Oct 2019 13:00:57 +0000 (15:00 +0200)
The txq_uar_init() routine uses the uninitialized uar_mmap_offset
field in 32-bit configurations due to this field is initialized
after txq_uar_init() call.

Fixes: 120dc4a7dcd3 ("net/mlx5: remove device register remap")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
drivers/net/mlx5/mlx5_txq.c

index 81f3b40..2b7d6c0 100644 (file)
@@ -572,7 +572,6 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
        txq_ibv->cq = tmpl.cq;
        rte_atomic32_inc(&txq_ibv->refcnt);
        txq_ctrl->bf_reg = qp.bf.reg;
-       txq_uar_init(txq_ctrl);
        if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) {
                txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset;
                DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%"PRIx64,
@@ -585,6 +584,7 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
                rte_errno = EINVAL;
                goto error;
        }
+       txq_uar_init(txq_ctrl);
        LIST_INSERT_HEAD(&priv->txqsibv, txq_ibv, next);
        txq_ibv->txq_ctrl = txq_ctrl;
        priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;