qede: add DCBX support
authorRasesh Mody <rasesh.mody@qlogic.com>
Wed, 27 Apr 2016 14:18:42 +0000 (07:18 -0700)
committerBruce Richardson <bruce.richardson@intel.com>
Fri, 6 May 2016 13:51:22 +0000 (15:51 +0200)
This patch adds LLDP and DCBX capabilities to the qede PMD.

Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
drivers/net/qede/Makefile
drivers/net/qede/base/bcm_osal.h
drivers/net/qede/base/ecore.h
drivers/net/qede/base/ecore_dcbx.c [new file with mode: 0644]
drivers/net/qede/base/ecore_dcbx.h [new file with mode: 0644]
drivers/net/qede/base/ecore_dcbx_api.h [new file with mode: 0644]
drivers/net/qede/base/ecore_dev.c
drivers/net/qede/base/ecore_mcp.c
drivers/net/qede/base/ecore_sp_commands.c
drivers/net/qede/base/mcp_public.h
drivers/net/qede/base/nvm_cfg.h

index 536d377..e973f43 100644 (file)
@@ -81,6 +81,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_spq.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_init_ops.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_mcp.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_int.c
+SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_dcbx.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/bcm_osal.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_sriov.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_vf.c
index ae43594..47d056e 100644 (file)
@@ -306,6 +306,7 @@ u32 qede_find_first_zero_bit(unsigned long *, u32);
 #define ETH_ALEN                       ETHER_ADDR_LEN
 
 #define OSAL_LINK_UPDATE(hwfn) qed_link_update(hwfn)
+#define OSAL_DCBX_AEN(hwfn, mib_type) nothing
 
 /* SR-IOV channel */
 
index 2f1a6d1..d682a78 100644 (file)
@@ -161,6 +161,7 @@ struct ecore_dma_mem;
 struct ecore_sb_sp_info;
 struct ecore_igu_info;
 struct ecore_mcp_info;
+struct ecore_dcbx_info;
 
 struct ecore_rt_data {
        u32 *init_val;
@@ -508,6 +509,7 @@ struct ecore_hwfn {
        struct ecore_vf_iov *vf_iov_info;
        struct ecore_pf_iov *pf_iov_info;
        struct ecore_mcp_info *mcp_info;
+       struct ecore_dcbx_info *p_dcbx_info;
 
        struct ecore_hw_cid_data *p_tx_cids;
        struct ecore_hw_cid_data *p_rx_cids;
diff --git a/drivers/net/qede/base/ecore_dcbx.c b/drivers/net/qede/base/ecore_dcbx.c
new file mode 100644 (file)
index 0000000..6a966cb
--- /dev/null
@@ -0,0 +1,887 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#include "bcm_osal.h"
+#include "ecore.h"
+#include "ecore_sp_commands.h"
+#include "ecore_dcbx.h"
+#include "ecore_cxt.h"
+#include "ecore_gtt_reg_addr.h"
+#include "ecore_iro.h"
+
+#define ECORE_DCBX_MAX_MIB_READ_TRY    (100)
+#define ECORE_MAX_PFC_PRIORITIES       8
+#define ECORE_ETH_TYPE_DEFAULT         (0)
+
+#define ECORE_DCBX_INVALID_PRIORITY    0xFF
+
+/* Get Traffic Class from priority traffic class table, 4 bits represent
+ * the traffic class corresponding to the priority.
+ */
+#define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
+               ((u32)(pri_tc_tbl >> ((7 - prio) * 4)) & 0x7)
+
+static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
+{
+       return (ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
+               DCBX_APP_SF_ETHTYPE) ? true : false;
+}
+
+static bool ecore_dcbx_app_port(u32 app_info_bitmap)
+{
+       return (ECORE_MFW_GET_FIELD(app_info_bitmap, DCBX_APP_SF) ==
+               DCBX_APP_SF_PORT) ? true : false;
+}
+
+static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id)
+{
+       return (ecore_dcbx_app_ethtype(app_info_bitmap) &&
+               proto_id == ECORE_ETH_TYPE_DEFAULT) ? true : false;
+}
+
+static bool ecore_dcbx_enabled(u32 dcbx_cfg_bitmap)
+{
+       return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
+               DCBX_CONFIG_VERSION_DISABLED) ? false : true;
+}
+
+static bool ecore_dcbx_cee(u32 dcbx_cfg_bitmap)
+{
+       return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
+               DCBX_CONFIG_VERSION_CEE) ? true : false;
+}
+
+static bool ecore_dcbx_ieee(u32 dcbx_cfg_bitmap)
+{
+       return (ECORE_MFW_GET_FIELD(dcbx_cfg_bitmap, DCBX_CONFIG_VERSION) ==
+               DCBX_CONFIG_VERSION_IEEE) ? true : false;
+}
+
+/* @@@TBD A0 Eagle workaround */
+void ecore_dcbx_eagle_workaround(struct ecore_hwfn *p_hwfn,
+                                struct ecore_ptt *p_ptt, bool set_to_pfc)
+{
+       if (!ENABLE_EAGLE_ENG1_WORKAROUND(p_hwfn))
+               return;
+
+       ecore_wr(p_hwfn, p_ptt,
+                YSEM_REG_FAST_MEMORY + 0x20000 /* RAM in FASTMEM */  +
+                YSTORM_FLOW_CONTROL_MODE_OFFSET,
+                set_to_pfc ? flow_ctrl_pfc : flow_ctrl_pause);
+       ecore_wr(p_hwfn, p_ptt, NIG_REG_FLOWCTRL_MODE,
+                EAGLE_ENG1_WORKAROUND_NIG_FLOWCTRL_MODE);
+}
+
+static void
+ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
+                      struct ecore_dcbx_results *p_data)
+{
+       struct ecore_hw_info *p_info = &p_hwfn->hw_info;
+       enum dcbx_protocol_type id;
+       bool enable, update;
+       u8 prio, tc, size;
+       const char *name;       /* @DPDK */
+       int i;
+
+       size = OSAL_ARRAY_SIZE(ecore_dcbx_app_update);
+
+       DP_INFO(p_hwfn, "DCBX negotiated: %d\n", p_data->dcbx_enabled);
+
+       for (i = 0; i < size; i++) {
+               id = ecore_dcbx_app_update[i].id;
+               name = ecore_dcbx_app_update[i].name;
+
+               enable = p_data->arr[id].enable;
+               update = p_data->arr[id].update;
+               tc = p_data->arr[id].tc;
+               prio = p_data->arr[id].priority;
+
+               DP_INFO(p_hwfn,
+                       "%s info: update %d, enable %d, prio %d, tc %d, num_tc %d\n",
+                       name, update, enable, prio, tc, p_info->num_tc);
+       }
+}
+
+static void
+ecore_dcbx_set_pf_tcs(struct ecore_hw_info *p_info,
+                     u8 tc, enum ecore_pci_personality personality)
+{
+       /* QM reconf data */
+       if (p_info->personality == personality) {
+               if (personality == ECORE_PCI_ETH)
+                       p_info->non_offload_tc = tc;
+               else
+                       p_info->offload_tc = tc;
+       }
+}
+
+void
+ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
+                     struct ecore_hw_info *p_info,
+                     bool enable, bool update, u8 prio, u8 tc,
+                     enum dcbx_protocol_type type,
+                     enum ecore_pci_personality personality)
+{
+       /* PF update ramrod data */
+       p_data->arr[type].update = update;
+       p_data->arr[type].enable = enable;
+       p_data->arr[type].priority = prio;
+       p_data->arr[type].tc = tc;
+
+       ecore_dcbx_set_pf_tcs(p_info, tc, personality);
+}
+
+/* Update app protocol data and hw_info fields with the TLV info */
+static void
+ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
+                          struct ecore_hwfn *p_hwfn,
+                          bool enable, bool update, u8 prio, u8 tc,
+                          enum dcbx_protocol_type type)
+{
+       struct ecore_hw_info *p_info = &p_hwfn->hw_info;
+       enum ecore_pci_personality personality;
+       enum dcbx_protocol_type id;
+       const char *name;       /* @DPDK */
+       u8 size;
+       int i;
+
+       size = OSAL_ARRAY_SIZE(ecore_dcbx_app_update);
+
+       for (i = 0; i < size; i++) {
+               id = ecore_dcbx_app_update[i].id;
+
+               if (type != id)
+                       continue;
+
+               personality = ecore_dcbx_app_update[i].personality;
+               name = ecore_dcbx_app_update[i].name;
+
+               ecore_dcbx_set_params(p_data, p_info, enable, update,
+                                     prio, tc, type, personality);
+       }
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
+{
+       u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
+       u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       /* Bitmap 1 corresponds to priority 0, return priority 0 */
+       if (pri_bitmap == 1) {
+               *priority = 0;
+               return rc;
+       }
+
+       /* Choose the highest priority */
+       while ((pri == ECORE_MAX_PFC_PRIORITIES) && index) {
+               pri_mask = 1 << index;
+               if (pri_bitmap & pri_mask)
+                       pri = index;
+               index--;
+       }
+
+       if (pri < ECORE_MAX_PFC_PRIORITIES)
+               *priority = (u8)pri;
+       else
+               rc = ECORE_INVAL;
+
+       return rc;
+}
+
+static bool
+ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
+                                u32 app_prio_bitmap, u16 id, int *type)
+{
+       bool status = false;
+
+       if (ecore_dcbx_default_tlv(app_prio_bitmap, id)) {
+               *type = DCBX_PROTOCOL_ETH;
+               status = true;
+       } else {
+               DP_ERR(p_hwfn, "Unsupported protocol %d\n", id);
+       }
+
+       return status;
+}
+
+/*  Parse app TLV's to update TC information in hw_info structure for
+ * reconfiguring QM. Get protocol specific data for PF update ramrod command.
+ */
+static enum _ecore_status_t
+ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
+                      struct ecore_dcbx_results *p_data,
+                      struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
+                      int count, bool dcbx_enabled)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       u8 tc, priority, priority_map;
+       int i, type = -1;
+       u16 protocol_id;
+       bool enable;
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Num APP entries = %d\n", count);
+
+       /* Parse APP TLV */
+       for (i = 0; i < count; i++) {
+               protocol_id = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
+                                                 DCBX_APP_PROTOCOL_ID);
+               priority_map = ECORE_MFW_GET_FIELD(p_tbl[i].entry,
+                                                  DCBX_APP_PRI_MAP);
+               rc = ecore_dcbx_get_app_priority(priority_map, &priority);
+               if (rc == ECORE_INVAL) {
+                       DP_ERR(p_hwfn, "Invalid priority\n");
+                       return rc;
+               }
+
+               tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
+               if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
+                                                    protocol_id, &type)) {
+                       /* ETH always have the enable bit reset, as it gets
+                        * vlan information per packet. For other protocols,
+                        * should be set according to the dcbx_enabled
+                        * indication, but we only got here if there was an
+                        * app tlv for the protocol, so dcbx must be enabled.
+                        */
+                       enable = (type == DCBX_PROTOCOL_ETH ? false : true);
+
+                       ecore_dcbx_update_app_info(p_data, p_hwfn, enable, true,
+                                                  priority, tc, type);
+               }
+       }
+       /* Update ramrod protocol data and hw_info fields
+        * with default info when corresponding APP TLV's are not detected.
+        * The enabled field has a different logic for ethernet as only for
+        * ethernet dcb should disabled by default, as the information arrives
+        * from the OS (unless an explicit app tlv was present).
+        */
+       tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
+       priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
+       for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
+               if (p_data->arr[type].update)
+                       continue;
+
+               enable = (type == DCBX_PROTOCOL_ETH) ? false : dcbx_enabled;
+               ecore_dcbx_update_app_info(p_data, p_hwfn, enable, true,
+                                          priority, tc, type);
+       }
+
+       return ECORE_SUCCESS;
+}
+
+/* Parse app TLV's to update TC information in hw_info structure for
+ * reconfiguring QM. Get protocol specific data for PF update ramrod command.
+ */
+static enum _ecore_status_t
+ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
+{
+       struct dcbx_app_priority_feature *p_app;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       struct ecore_dcbx_results data = { 0 };
+       struct dcbx_app_priority_entry *p_tbl;
+       struct dcbx_ets_feature *p_ets;
+       struct ecore_hw_info *p_info;
+       u32 pri_tc_tbl, flags;
+       bool dcbx_enabled;
+       int num_entries;
+
+       /* If DCBx version is non zero, then negotiation was
+        * successfuly performed
+        */
+       flags = p_hwfn->p_dcbx_info->operational.flags;
+       dcbx_enabled = ECORE_MFW_GET_FIELD(flags, DCBX_CONFIG_VERSION) != 0;
+
+       p_app = &p_hwfn->p_dcbx_info->operational.features.app;
+       p_tbl = p_app->app_pri_tbl;
+
+       p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
+       pri_tc_tbl = p_ets->pri_tc_tbl[0];
+
+       p_info = &p_hwfn->hw_info;
+       num_entries = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
+
+       rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
+                                   num_entries, dcbx_enabled);
+       if (rc != ECORE_SUCCESS)
+               return rc;
+
+       p_info->num_tc = ECORE_MFW_GET_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
+       data.pf_id = p_hwfn->rel_pf_id;
+       data.dcbx_enabled = dcbx_enabled;
+
+       ecore_dcbx_dp_protocol(p_hwfn, &data);
+
+       OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
+                   sizeof(struct ecore_dcbx_results));
+
+       return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
+                   struct ecore_ptt *p_ptt,
+                   struct ecore_dcbx_mib_meta_data *p_data,
+                   enum ecore_mib_read_type type)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       u32 prefix_seq_num, suffix_seq_num;
+       int read_count = 0;
+
+       do {
+               if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
+                       ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
+                                         p_data->addr, p_data->size);
+                       prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
+                       suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
+               } else {
+                       ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
+                                         p_data->addr, p_data->size);
+                       prefix_seq_num = p_data->mib->prefix_seq_num;
+                       suffix_seq_num = p_data->mib->suffix_seq_num;
+               }
+               read_count++;
+
+               DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                          "mib type = %d, try count = %d prefix seq num  = %d suffix seq num = %d\n",
+                          type, read_count, prefix_seq_num, suffix_seq_num);
+       } while ((prefix_seq_num != suffix_seq_num) &&
+                (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
+
+       if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
+               DP_ERR(p_hwfn,
+                      "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
+                      type, read_count, prefix_seq_num, suffix_seq_num);
+               rc = ECORE_IO;
+       }
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
+                            struct ecore_dcbx_app_prio *p_prio,
+                            struct ecore_dcbx_results *p_results)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
+           p_results->arr[DCBX_PROTOCOL_ETH].enable) {
+               p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
+               DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                          "Priority: eth %d\n", p_prio->eth);
+       }
+
+       return rc;
+}
+
+static void
+ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
+                       struct dcbx_app_priority_feature *p_app,
+                       struct dcbx_app_priority_entry *p_tbl,
+                       struct ecore_dcbx_params *p_params)
+{
+       int i;
+
+       p_params->app_willing = ECORE_MFW_GET_FIELD(p_app->flags,
+                                                   DCBX_APP_WILLING);
+       p_params->app_valid = ECORE_MFW_GET_FIELD(p_app->flags,
+                                                 DCBX_APP_ENABLED);
+       p_params->num_app_entries = ECORE_MFW_GET_FIELD(p_app->flags,
+                                                       DCBX_APP_ENABLED);
+       for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
+               p_params->app_bitmap[i] = p_tbl[i].entry;
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                  "APP params: willing %d, valid %d\n",
+                  p_params->app_willing, p_params->app_valid);
+}
+
+static void
+ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
+                       u32 pfc, struct ecore_dcbx_params *p_params)
+{
+       p_params->pfc_willing = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING);
+       p_params->max_pfc_tc = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS);
+       p_params->pfc_enabled = ECORE_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED);
+       p_params->pfc_bitmap = pfc;
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                  "PFC params: willing %d, pfc_bitmap %d\n",
+                  p_params->pfc_willing, p_params->pfc_bitmap);
+}
+
+static void
+ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
+                       struct dcbx_ets_feature *p_ets,
+                       struct ecore_dcbx_params *p_params)
+{
+       int i;
+
+       p_params->ets_willing = ECORE_MFW_GET_FIELD(p_ets->flags,
+                                                   DCBX_ETS_WILLING);
+       p_params->ets_enabled = ECORE_MFW_GET_FIELD(p_ets->flags,
+                                                   DCBX_ETS_ENABLED);
+       p_params->max_ets_tc = ECORE_MFW_GET_FIELD(p_ets->flags,
+                                                  DCBX_ETS_MAX_TCS);
+       p_params->ets_pri_tc_tbl[0] = p_ets->pri_tc_tbl[0];
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                  "ETS params: willing %d, pri_tc_tbl_0 %x max_ets_tc %d\n",
+                  p_params->ets_willing, p_params->ets_pri_tc_tbl[0],
+                  p_params->max_ets_tc);
+
+       /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
+        * encoded in a type u32 array of size 2.
+        */
+       for (i = 0; i < 2; i++) {
+               p_params->ets_tc_tsa_tbl[i] = p_ets->tc_tsa_tbl[i];
+               p_params->ets_tc_bw_tbl[i] = p_ets->tc_bw_tbl[i];
+
+               DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                          "elem %d  bw_tbl %x tsa_tbl %x\n",
+                          i, p_params->ets_tc_bw_tbl[i],
+                          p_params->ets_tc_tsa_tbl[i]);
+       }
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
+                            struct dcbx_app_priority_feature *p_app,
+                            struct dcbx_app_priority_entry *p_tbl,
+                            struct dcbx_ets_feature *p_ets,
+                            u32 pfc, struct ecore_dcbx_params *p_params)
+{
+       ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params);
+       ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
+       ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
+
+       return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
+                           struct ecore_ptt *p_ptt,
+                           struct ecore_dcbx_get *params)
+{
+       struct ecore_dcbx_admin_params *p_local;
+       struct dcbx_app_priority_feature *p_app;
+       struct dcbx_app_priority_entry *p_tbl;
+       struct ecore_dcbx_params *p_data;
+       struct dcbx_ets_feature *p_ets;
+       u32 pfc;
+
+       p_local = &params->local;
+       p_data = &p_local->params;
+       p_app = &p_hwfn->p_dcbx_info->local_admin.features.app;
+       p_tbl = p_app->app_pri_tbl;
+       p_ets = &p_hwfn->p_dcbx_info->local_admin.features.ets;
+       pfc = p_hwfn->p_dcbx_info->local_admin.features.pfc;
+
+       ecore_dcbx_get_common_params(p_hwfn, p_app, p_tbl, p_ets, pfc, p_data);
+       p_local->valid = true;
+
+       return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
+                            struct ecore_ptt *p_ptt,
+                            struct ecore_dcbx_get *params)
+{
+       struct ecore_dcbx_remote_params *p_remote;
+       struct dcbx_app_priority_feature *p_app;
+       struct dcbx_app_priority_entry *p_tbl;
+       struct ecore_dcbx_params *p_data;
+       struct dcbx_ets_feature *p_ets;
+       u32 pfc;
+
+       p_remote = &params->remote;
+       p_data = &p_remote->params;
+       p_app = &p_hwfn->p_dcbx_info->remote.features.app;
+       p_tbl = p_app->app_pri_tbl;
+       p_ets = &p_hwfn->p_dcbx_info->remote.features.ets;
+       pfc = p_hwfn->p_dcbx_info->remote.features.pfc;
+
+       ecore_dcbx_get_common_params(p_hwfn, p_app, p_tbl, p_ets, pfc, p_data);
+       p_remote->valid = true;
+
+       return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
+                                 struct ecore_ptt *p_ptt,
+                                 struct ecore_dcbx_get *params)
+{
+       struct ecore_dcbx_operational_params *p_operational;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       struct dcbx_app_priority_feature *p_app;
+       struct dcbx_app_priority_entry *p_tbl;
+       struct ecore_dcbx_results *p_results;
+       struct ecore_dcbx_params *p_data;
+       struct dcbx_ets_feature *p_ets;
+       bool enabled, err;
+       u32 pfc, flags;
+
+       flags = p_hwfn->p_dcbx_info->operational.flags;
+
+       /* If DCBx version is non zero, then negotiation
+        * was successfuly performed
+        */
+       p_operational = &params->operational;
+       enabled = ecore_dcbx_enabled(flags);
+       if (!enabled) {
+               p_operational->enabled = enabled;
+               p_operational->valid = false;
+               return ECORE_INVAL;
+       }
+
+       p_data = &p_operational->params;
+       p_results = &p_hwfn->p_dcbx_info->results;
+       p_app = &p_hwfn->p_dcbx_info->operational.features.app;
+       p_tbl = p_app->app_pri_tbl;
+       p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
+       pfc = p_hwfn->p_dcbx_info->operational.features.pfc;
+
+       p_operational->ieee = ecore_dcbx_ieee(flags);
+       p_operational->cee = ecore_dcbx_cee(flags);
+
+       DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                  "Version support: ieee %d, cee %d\n",
+                  p_operational->ieee, p_operational->cee);
+
+       ecore_dcbx_get_common_params(p_hwfn, p_app, p_tbl, p_ets, pfc, p_data);
+       ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
+                                    p_results);
+       err = ECORE_MFW_GET_FIELD(p_app->flags, DCBX_APP_ERROR);
+       p_operational->err = err;
+       p_operational->enabled = enabled;
+       p_operational->valid = true;
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
+                                struct ecore_ptt *p_ptt,
+                                struct ecore_dcbx_get *params)
+{
+       struct ecore_dcbx_lldp_local *p_local;
+       osal_size_t size;
+       u32 *dest;
+
+       p_local = &params->lldp_local;
+
+       size = OSAL_ARRAY_SIZE(p_local->local_chassis_id);
+       dest = p_hwfn->p_dcbx_info->get.lldp_local.local_chassis_id;
+       OSAL_MEMCPY(dest, p_local->local_chassis_id, size);
+
+       size = OSAL_ARRAY_SIZE(p_local->local_port_id);
+       dest = p_hwfn->p_dcbx_info->get.lldp_local.local_port_id;
+       OSAL_MEMCPY(dest, p_local->local_port_id, size);
+
+       return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
+                                 struct ecore_ptt *p_ptt,
+                                 struct ecore_dcbx_get *params)
+{
+       struct ecore_dcbx_lldp_remote *p_remote;
+       osal_size_t size;
+       u32 *dest;
+
+       p_remote = &params->lldp_remote;
+
+       size = OSAL_ARRAY_SIZE(p_remote->peer_chassis_id);
+       dest = p_hwfn->p_dcbx_info->get.lldp_remote.peer_chassis_id;
+       OSAL_MEMCPY(dest, p_remote->peer_chassis_id, size);
+
+       size = OSAL_ARRAY_SIZE(p_remote->peer_port_id);
+       dest = p_hwfn->p_dcbx_info->get.lldp_remote.peer_port_id;
+       OSAL_MEMCPY(dest, p_remote->peer_port_id, size);
+
+       return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
+                     struct ecore_ptt *p_ptt, enum ecore_mib_read_type type)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       struct ecore_dcbx_get *p_params;
+
+       p_params = &p_hwfn->p_dcbx_info->get;
+
+       switch (type) {
+       case ECORE_DCBX_REMOTE_MIB:
+               ecore_dcbx_get_remote_params(p_hwfn, p_ptt, p_params);
+               break;
+       case ECORE_DCBX_LOCAL_MIB:
+               ecore_dcbx_get_local_params(p_hwfn, p_ptt, p_params);
+               break;
+       case ECORE_DCBX_OPERATIONAL_MIB:
+               ecore_dcbx_get_operational_params(p_hwfn, p_ptt, p_params);
+               break;
+       case ECORE_DCBX_REMOTE_LLDP_MIB:
+               rc = ecore_dcbx_get_remote_lldp_params(p_hwfn, p_ptt, p_params);
+               break;
+       case ECORE_DCBX_LOCAL_LLDP_MIB:
+               rc = ecore_dcbx_get_local_lldp_params(p_hwfn, p_ptt, p_params);
+               break;
+       default:
+               DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
+               return ECORE_INVAL;
+       }
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
+                              struct ecore_ptt *p_ptt)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       struct ecore_dcbx_mib_meta_data data;
+
+       data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
+                                                          lldp_config_params);
+       data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
+       data.size = sizeof(struct lldp_config_params_s);
+       ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
+                               struct ecore_ptt *p_ptt,
+                               enum ecore_mib_read_type type)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+       struct ecore_dcbx_mib_meta_data data;
+
+       data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
+                                                          lldp_status_params);
+       data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
+       data.size = sizeof(struct lldp_status_params_s);
+       rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
+                               struct ecore_ptt *p_ptt,
+                               enum ecore_mib_read_type type)
+{
+       struct ecore_dcbx_mib_meta_data data;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       data.addr = p_hwfn->mcp_info->port_addr +
+           offsetof(struct public_port, operational_dcbx_mib);
+       data.mib = &p_hwfn->p_dcbx_info->operational;
+       data.size = sizeof(struct dcbx_mib);
+       rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
+                          struct ecore_ptt *p_ptt,
+                          enum ecore_mib_read_type type)
+{
+       struct ecore_dcbx_mib_meta_data data;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       data.addr = p_hwfn->mcp_info->port_addr +
+           offsetof(struct public_port, remote_dcbx_mib);
+       data.mib = &p_hwfn->p_dcbx_info->remote;
+       data.size = sizeof(struct dcbx_mib);
+       rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
+
+       return rc;
+}
+
+static enum _ecore_status_t
+ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
+{
+       struct ecore_dcbx_mib_meta_data data;
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       data.addr = p_hwfn->mcp_info->port_addr +
+           offsetof(struct public_port, local_admin_dcbx_mib);
+       data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
+       data.size = sizeof(struct dcbx_local_params);
+       ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
+                         data.addr, data.size);
+
+       return rc;
+}
+
+static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
+                                               struct ecore_ptt *p_ptt,
+                                               enum ecore_mib_read_type type)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       switch (type) {
+       case ECORE_DCBX_OPERATIONAL_MIB:
+               rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
+               break;
+       case ECORE_DCBX_REMOTE_MIB:
+               rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
+               break;
+       case ECORE_DCBX_LOCAL_MIB:
+               rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
+               break;
+       case ECORE_DCBX_REMOTE_LLDP_MIB:
+               rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
+               break;
+       case ECORE_DCBX_LOCAL_LLDP_MIB:
+               rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
+               break;
+       default:
+               DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
+               return ECORE_INVAL;
+       }
+
+       return rc;
+}
+
+/*
+ * Read updated MIB.
+ * Reconfigure QM and invoke PF update ramrod command if operational MIB
+ * change is detected.
+ */
+enum _ecore_status_t
+ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+                           enum ecore_mib_read_type type)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
+       if (rc)
+               return rc;
+
+       if (type == ECORE_DCBX_OPERATIONAL_MIB) {
+               rc = ecore_dcbx_process_mib_info(p_hwfn);
+               if (!rc) {
+                       bool enabled;
+
+                       /* reconfigure tcs of QM queues according
+                        * to negotiation results
+                        */
+                       ecore_qm_reconf(p_hwfn, p_ptt);
+
+                       /* update storm FW with negotiation results */
+                       ecore_sp_pf_update(p_hwfn);
+
+                       /* set eagle enigne 1 flow control workaround
+                        * according to negotiation results
+                        */
+                       enabled = p_hwfn->p_dcbx_info->results.dcbx_enabled;
+                       ecore_dcbx_eagle_workaround(p_hwfn, p_ptt, enabled);
+               }
+       }
+       ecore_dcbx_get_params(p_hwfn, p_ptt, type);
+       OSAL_DCBX_AEN(p_hwfn, type);
+
+       return rc;
+}
+
+enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
+{
+       enum _ecore_status_t rc = ECORE_SUCCESS;
+
+       p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
+                                         sizeof(struct ecore_dcbx_info));
+       if (!p_hwfn->p_dcbx_info) {
+               DP_NOTICE(p_hwfn, true,
+                         "Failed to allocate `struct ecore_dcbx_info'");
+               rc = ECORE_NOMEM;
+       }
+
+       return rc;
+}
+
+void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn,
+                         struct ecore_dcbx_info *p_dcbx_info)
+{
+       OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
+}
+
+static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
+                                           struct ecore_dcbx_results *p_src,
+                                           enum dcbx_protocol_type type)
+{
+       p_data->dcb_enable_flag = p_src->arr[type].enable;
+       p_data->dcb_priority = p_src->arr[type].priority;
+       p_data->dcb_tc = p_src->arr[type].tc;
+}
+
+/* Set pf update ramrod command params */
+void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
+                                    struct pf_update_ramrod_data *p_dest)
+{
+       struct protocol_dcb_data *p_dcb_data;
+       bool update_flag;
+
+       p_dest->pf_id = p_src->pf_id;
+
+       update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
+       p_dest->update_eth_dcb_data_flag = update_flag;
+
+       p_dcb_data = &p_dest->eth_dcb_data;
+       ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
+}
+
+static
+enum _ecore_status_t ecore_dcbx_query(struct ecore_hwfn *p_hwfn,
+                                     enum ecore_mib_read_type type)
+{
+       struct ecore_ptt *p_ptt;
+       enum _ecore_status_t rc;
+
+       p_ptt = ecore_ptt_acquire(p_hwfn);
+       if (!p_ptt) {
+               rc = ECORE_TIMEOUT;
+               DP_ERR(p_hwfn, "rc = %d\n", rc);
+               return rc;
+       }
+
+       rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
+       if (rc != ECORE_SUCCESS)
+               goto out;
+
+       rc = ecore_dcbx_get_params(p_hwfn, p_ptt, type);
+
+out:
+       ecore_ptt_release(p_hwfn, p_ptt);
+       return rc;
+}
+
+enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
+                                            struct ecore_dcbx_get *p_get,
+                                            enum ecore_mib_read_type type)
+{
+       enum _ecore_status_t rc;
+
+       rc = ecore_dcbx_query(p_hwfn, type);
+       if (rc)
+               return rc;
+
+       if (p_get != OSAL_NULL)
+               OSAL_MEMCPY(p_get, &p_hwfn->p_dcbx_info->get,
+                           sizeof(struct ecore_dcbx_get));
+
+       return rc;
+}
diff --git a/drivers/net/qede/base/ecore_dcbx.h b/drivers/net/qede/base/ecore_dcbx.h
new file mode 100644 (file)
index 0000000..d577f4e
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_DCBX_H__
+#define __ECORE_DCBX_H__
+
+#include "ecore.h"
+#include "ecore_mcp.h"
+#include "mcp_public.h"
+#include "reg_addr.h"
+#include "ecore_hw.h"
+#include "ecore_hsi_common.h"
+#include "ecore_dcbx_api.h"
+
+#define ECORE_MFW_GET_FIELD(name, field) \
+       (((name) & (field ## _MASK)) >> (field ## _SHIFT))
+
+struct ecore_dcbx_info {
+       struct lldp_status_params_s lldp_remote[LLDP_MAX_LLDP_AGENTS];
+       struct lldp_config_params_s lldp_local[LLDP_MAX_LLDP_AGENTS];
+       struct dcbx_local_params local_admin;
+       struct ecore_dcbx_results results;
+       struct dcbx_mib operational;
+       struct dcbx_mib remote;
+       struct ecore_dcbx_set set;
+       struct ecore_dcbx_get get;
+       u8 dcbx_cap;
+};
+
+/* Upper layer driver interface routines */
+enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *,
+                                             struct ecore_ptt *,
+                                             struct ecore_dcbx_set *);
+
+/* ECORE local interface routines */
+enum _ecore_status_t
+ecore_dcbx_mib_update_event(struct ecore_hwfn *, struct ecore_ptt *,
+                           enum ecore_mib_read_type);
+
+enum _ecore_status_t ecore_dcbx_read_lldp_params(struct ecore_hwfn *,
+                                                struct ecore_ptt *);
+enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn);
+void ecore_dcbx_info_free(struct ecore_hwfn *, struct ecore_dcbx_info *);
+void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
+                                    struct pf_update_ramrod_data *p_dest);
+/* @@@TBD eagle phy workaround */
+void ecore_dcbx_eagle_workaround(struct ecore_hwfn *, struct ecore_ptt *,
+                                bool set_to_pfc);
+
+#endif /* __ECORE_DCBX_H__ */
diff --git a/drivers/net/qede/base/ecore_dcbx_api.h b/drivers/net/qede/base/ecore_dcbx_api.h
new file mode 100644 (file)
index 0000000..7767d48
--- /dev/null
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_DCBX_API_H__
+#define __ECORE_DCBX_API_H__
+
+#include "ecore.h"
+
+#define DCBX_CONFIG_MAX_APP_PROTOCOL   4
+
+enum ecore_mib_read_type {
+       ECORE_DCBX_OPERATIONAL_MIB,
+       ECORE_DCBX_REMOTE_MIB,
+       ECORE_DCBX_LOCAL_MIB,
+       ECORE_DCBX_REMOTE_LLDP_MIB,
+       ECORE_DCBX_LOCAL_LLDP_MIB
+};
+
+struct ecore_dcbx_app_data {
+       bool enable;            /* DCB enabled */
+       bool update;            /* Update indication */
+       u8 priority;            /* Priority */
+       u8 tc;                  /* Traffic Class */
+};
+
+#ifndef __EXTRACT__LINUX__
+enum dcbx_protocol_type {
+       DCBX_PROTOCOL_ETH,
+       DCBX_MAX_PROTOCOL_TYPE
+};
+
+#ifdef LINUX_REMOVE
+/* We can't assume THE HSI values are available to clients, so we need
+ * to redefine those here.
+ */
+#ifndef LLDP_CHASSIS_ID_STAT_LEN
+#define LLDP_CHASSIS_ID_STAT_LEN 4
+#endif
+#ifndef LLDP_PORT_ID_STAT_LEN
+#define LLDP_PORT_ID_STAT_LEN 4
+#endif
+#ifndef DCBX_MAX_APP_PROTOCOL
+#define DCBX_MAX_APP_PROTOCOL 32
+#endif
+
+#endif
+
+struct ecore_dcbx_lldp_remote {
+       u32 peer_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
+       u32 peer_port_id[LLDP_PORT_ID_STAT_LEN];
+       bool enable_rx;
+       bool enable_tx;
+       u32 tx_interval;
+       u32 max_credit;
+};
+
+struct ecore_dcbx_lldp_local {
+       u32 local_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
+       u32 local_port_id[LLDP_PORT_ID_STAT_LEN];
+};
+
+struct ecore_dcbx_app_prio {
+       u8 eth;
+};
+
+struct ecore_dcbx_params {
+       u32 app_bitmap[DCBX_MAX_APP_PROTOCOL];
+       u16 num_app_entries;
+       bool app_willing;
+       bool app_valid;
+       bool ets_willing;
+       bool ets_enabled;
+       bool valid;             /* Indicate validity of params */
+       u32 ets_pri_tc_tbl[1];
+       u32 ets_tc_bw_tbl[2];
+       u32 ets_tc_tsa_tbl[2];
+       bool pfc_willing;
+       bool pfc_enabled;
+       u32 pfc_bitmap;
+       u8 max_pfc_tc;
+       u8 max_ets_tc;
+};
+
+struct ecore_dcbx_admin_params {
+       struct ecore_dcbx_params params;
+       bool valid;             /* Indicate validity of params */
+};
+
+struct ecore_dcbx_remote_params {
+       struct ecore_dcbx_params params;
+       bool valid;             /* Indicate validity of params */
+};
+
+struct ecore_dcbx_operational_params {
+       struct ecore_dcbx_app_prio app_prio;
+       struct ecore_dcbx_params params;
+       bool valid;             /* Indicate validity of params */
+       bool enabled;
+       bool ieee;
+       bool cee;
+       u32 err;
+};
+
+struct ecore_dcbx_get {
+       struct ecore_dcbx_operational_params operational;
+       struct ecore_dcbx_lldp_remote lldp_remote;
+       struct ecore_dcbx_lldp_local lldp_local;
+       struct ecore_dcbx_remote_params remote;
+       struct ecore_dcbx_admin_params local;
+};
+#endif
+
+struct ecore_dcbx_set {
+       struct ecore_dcbx_admin_params config;
+       bool enabled;
+       u32 ver_num;
+};
+
+struct ecore_dcbx_results {
+       bool dcbx_enabled;
+       u8 pf_id;
+       struct ecore_dcbx_app_data arr[DCBX_MAX_PROTOCOL_TYPE];
+};
+
+struct ecore_dcbx_app_metadata {
+       enum dcbx_protocol_type id;
+       const char *name;       /* @DPDK */
+       enum ecore_pci_personality personality;
+};
+
+struct ecore_dcbx_mib_meta_data {
+       struct lldp_config_params_s *lldp_local;
+       struct lldp_status_params_s *lldp_remote;
+       struct dcbx_local_params *local_admin;
+       struct dcbx_mib *mib;
+       osal_size_t size;
+       u32 addr;
+};
+
+void
+ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
+                     struct ecore_hw_info *p_info,
+                     bool enable, bool update, u8 prio, u8 tc,
+                     enum dcbx_protocol_type type,
+                     enum ecore_pci_personality personality);
+
+enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *,
+                                            struct ecore_dcbx_get *,
+                                            enum ecore_mib_read_type);
+
+static const struct ecore_dcbx_app_metadata ecore_dcbx_app_update[] = {
+       {DCBX_PROTOCOL_ETH, "ETH", ECORE_PCI_ETH}
+};
+
+#endif /* __ECORE_DCBX_API_H__ */
index 0ded161..0a68969 100644 (file)
@@ -30,6 +30,7 @@
 #include "nvm_cfg.h"
 #include "ecore_dev_api.h"
 #include "ecore_attn_values.h"
+#include "ecore_dcbx.h"
 
 /* Configurable */
 #define ECORE_MIN_DPIS         (4)     /* The minimal number of DPIs required
@@ -157,6 +158,7 @@ void ecore_resc_free(struct ecore_dev *p_dev)
                ecore_int_free(p_hwfn);
                ecore_iov_free(p_hwfn);
                ecore_dmae_info_free(p_hwfn);
+               ecore_dcbx_info_free(p_hwfn, p_hwfn->p_dcbx_info);
                /* @@@TBD Flush work-queue ? */
        }
 }
@@ -279,6 +281,9 @@ static enum _ecore_status_t ecore_init_qm_info(struct ecore_hwfn *p_hwfn,
        for (i = 0; i < num_ports; i++) {
                p_qm_port = &qm_info->qm_port_params[i];
                p_qm_port->active = 1;
+               /* @@@TMP - was NUM_OF_PHYS_TCS; Changed until dcbx will
+                * be in place
+                */
                if (num_ports == 4)
                        p_qm_port->num_active_phys_tcs = 2;
                else
@@ -477,6 +482,14 @@ enum _ecore_status_t ecore_resc_alloc(struct ecore_dev *p_dev)
                                  " dmae_info structure\n");
                        goto alloc_err;
                }
+
+               /* DCBX initialization */
+               rc = ecore_dcbx_info_alloc(p_hwfn);
+               if (rc) {
+                       DP_NOTICE(p_hwfn, true,
+                                 "Failed to allocate memory for dcbxstruct\n");
+                       goto alloc_err;
+               }
        }
 
        p_dev->reset_stats = OSAL_ZALLOC(p_dev, GFP_KERNEL,
@@ -1437,6 +1450,20 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
                        return mfw_rc;
                }
 
+               /* send DCBX attention request command */
+               DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
+                          "sending phony dcbx set command to trigger DCBx"
+                          " attention handling\n");
+               mfw_rc = ecore_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
+                                      DRV_MSG_CODE_SET_DCBX,
+                                      1 << DRV_MB_PARAM_DCBX_NOTIFY_SHIFT,
+                                      &load_code, &param);
+               if (mfw_rc != ECORE_SUCCESS) {
+                       DP_NOTICE(p_hwfn, true,
+                                 "Failed to send DCBX attention request\n");
+                       return mfw_rc;
+               }
+
                p_hwfn->hw_init_done = true;
        }
 
index 31ebc99..bdc6a5e 100644 (file)
@@ -18,6 +18,7 @@
 #include "ecore_iov_api.h"
 #include "ecore_gtt_reg_addr.h"
 #include "ecore_iro.h"
+#include "ecore_dcbx.h"
 
 #define CHIP_MCP_RESP_ITER_US 10
 #define EMUL_MCP_RESP_ITER_US (1000 * 1000)
@@ -726,6 +727,9 @@ static void ecore_mcp_handle_link_change(struct ecore_hwfn *p_hwfn,
 
        p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT);
 
+       if (p_link->link_up)
+               ecore_dcbx_eagle_workaround(p_hwfn, p_ptt, p_link->pfc_enabled);
+
        OSAL_LINK_UPDATE(p_hwfn);
 }
 
@@ -998,6 +1002,18 @@ enum _ecore_status_t ecore_mcp_handle_events(struct ecore_hwfn *p_hwfn,
                case MFW_DRV_MSG_VF_DISABLED:
                        ecore_mcp_handle_vf_flr(p_hwfn, p_ptt);
                        break;
+               case MFW_DRV_MSG_LLDP_DATA_UPDATED:
+                       ecore_dcbx_mib_update_event(p_hwfn, p_ptt,
+                                                   ECORE_DCBX_REMOTE_LLDP_MIB);
+                       break;
+               case MFW_DRV_MSG_DCBX_REMOTE_MIB_UPDATED:
+                       ecore_dcbx_mib_update_event(p_hwfn, p_ptt,
+                                                   ECORE_DCBX_REMOTE_MIB);
+                       break;
+               case MFW_DRV_MSG_DCBX_OPERATIONAL_MIB_UPDATED:
+                       ecore_dcbx_mib_update_event(p_hwfn, p_ptt,
+                                                   ECORE_DCBX_OPERATIONAL_MIB);
+                       break;
                case MFW_DRV_MSG_ERROR_RECOVERY:
                        ecore_mcp_handle_process_kill(p_hwfn, p_ptt);
                        break;
index 7c6e254..e9ac898 100644 (file)
@@ -20,6 +20,7 @@
 #include "reg_addr.h"
 #include "ecore_int.h"
 #include "ecore_hw.h"
+#include "ecore_dcbx.h"
 
 enum _ecore_status_t ecore_sp_init_request(struct ecore_hwfn *p_hwfn,
                                           struct ecore_spq_entry **pp_ent,
@@ -430,6 +431,9 @@ enum _ecore_status_t ecore_sp_pf_update(struct ecore_hwfn *p_hwfn)
        if (rc != ECORE_SUCCESS)
                return rc;
 
+       ecore_dcbx_set_pf_update_params(&p_hwfn->p_dcbx_info->results,
+                                       &p_ent->ramrod.pf_update);
+
        return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 }
 
index f74e506..7192265 100644 (file)
@@ -183,6 +183,184 @@ struct couple_mode_teaming {
 #define PORT_CMT_TEAM1              (1 << 2)
 };
 
+/**************************************
+ *     LLDP and DCBX HSI structures
+ **************************************/
+#define LLDP_CHASSIS_ID_STAT_LEN 4
+#define LLDP_PORT_ID_STAT_LEN 4
+#define DCBX_MAX_APP_PROTOCOL          32
+#define MAX_SYSTEM_LLDP_TLV_DATA    32
+
+typedef enum _lldp_agent_e {
+       LLDP_NEAREST_BRIDGE = 0,
+       LLDP_NEAREST_NON_TPMR_BRIDGE,
+       LLDP_NEAREST_CUSTOMER_BRIDGE,
+       LLDP_MAX_LLDP_AGENTS
+} lldp_agent_e;
+
+struct lldp_config_params_s {
+       u32 config;
+#define LLDP_CONFIG_TX_INTERVAL_MASK        0x000000ff
+#define LLDP_CONFIG_TX_INTERVAL_SHIFT       0
+#define LLDP_CONFIG_HOLD_MASK               0x00000f00
+#define LLDP_CONFIG_HOLD_SHIFT              8
+#define LLDP_CONFIG_MAX_CREDIT_MASK         0x0000f000
+#define LLDP_CONFIG_MAX_CREDIT_SHIFT        12
+#define LLDP_CONFIG_ENABLE_RX_MASK          0x40000000
+#define LLDP_CONFIG_ENABLE_RX_SHIFT         30
+#define LLDP_CONFIG_ENABLE_TX_MASK          0x80000000
+#define LLDP_CONFIG_ENABLE_TX_SHIFT         31
+       /* Holds local Chassis ID TLV header, subtype and 9B of payload.
+        * If firtst byte is 0, then we will use default chassis ID
+        */
+       u32 local_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
+       /* Holds local Port ID TLV header, subtype and 9B of payload.
+        * If firtst byte is 0, then we will use default port ID
+        */
+       u32 local_port_id[LLDP_PORT_ID_STAT_LEN];
+};
+
+struct lldp_status_params_s {
+       u32 prefix_seq_num;
+       u32 status;             /* TBD */
+       /* Holds remote Chassis ID TLV header, subtype and 9B of payload.
+        */
+       u32 local_port_id[LLDP_PORT_ID_STAT_LEN];
+       u32 peer_chassis_id[LLDP_CHASSIS_ID_STAT_LEN];
+       /* Holds remote Port ID TLV header, subtype and 9B of payload.
+        */
+       u32 peer_port_id[LLDP_PORT_ID_STAT_LEN];
+       u32 suffix_seq_num;
+};
+
+struct dcbx_ets_feature {
+       u32 flags;
+#define DCBX_ETS_ENABLED_MASK                   0x00000001
+#define DCBX_ETS_ENABLED_SHIFT                  0
+#define DCBX_ETS_WILLING_MASK                   0x00000002
+#define DCBX_ETS_WILLING_SHIFT                  1
+#define DCBX_ETS_ERROR_MASK                     0x00000004
+#define DCBX_ETS_ERROR_SHIFT                    2
+#define DCBX_ETS_CBS_MASK                       0x00000008
+#define DCBX_ETS_CBS_SHIFT                      3
+#define DCBX_ETS_MAX_TCS_MASK                   0x000000f0
+#define DCBX_ETS_MAX_TCS_SHIFT                  4
+       u32 pri_tc_tbl[1];
+#define DCBX_CEE_STRICT_PRIORITY               0xf
+#define DCBX_CEE_STRICT_PRIORITY_TC            0x7
+       u32 tc_bw_tbl[2];
+       u32 tc_tsa_tbl[2];
+#define DCBX_ETS_TSA_STRICT                    0
+#define DCBX_ETS_TSA_CBS                       1
+#define DCBX_ETS_TSA_ETS                       2
+};
+
+struct dcbx_app_priority_entry {
+       u32 entry;
+#define DCBX_APP_PRI_MAP_MASK       0x000000ff
+#define DCBX_APP_PRI_MAP_SHIFT      0
+#define DCBX_APP_PRI_0              0x01
+#define DCBX_APP_PRI_1              0x02
+#define DCBX_APP_PRI_2              0x04
+#define DCBX_APP_PRI_3              0x08
+#define DCBX_APP_PRI_4              0x10
+#define DCBX_APP_PRI_5              0x20
+#define DCBX_APP_PRI_6              0x40
+#define DCBX_APP_PRI_7              0x80
+#define DCBX_APP_SF_MASK            0x00000300
+#define DCBX_APP_SF_SHIFT           8
+#define DCBX_APP_SF_ETHTYPE         0
+#define DCBX_APP_SF_PORT            1
+#define DCBX_APP_PROTOCOL_ID_MASK   0xffff0000
+#define DCBX_APP_PROTOCOL_ID_SHIFT  16
+};
+
+/* FW structure in BE */
+struct dcbx_app_priority_feature {
+       u32 flags;
+#define DCBX_APP_ENABLED_MASK           0x00000001
+#define DCBX_APP_ENABLED_SHIFT          0
+#define DCBX_APP_WILLING_MASK           0x00000002
+#define DCBX_APP_WILLING_SHIFT          1
+#define DCBX_APP_ERROR_MASK             0x00000004
+#define DCBX_APP_ERROR_SHIFT            2
+       /* Not in use
+        * #define DCBX_APP_DEFAULT_PRI_MASK       0x00000f00
+        * #define DCBX_APP_DEFAULT_PRI_SHIFT      8
+        */
+#define DCBX_APP_MAX_TCS_MASK           0x0000f000
+#define DCBX_APP_MAX_TCS_SHIFT          12
+#define DCBX_APP_NUM_ENTRIES_MASK       0x00ff0000
+#define DCBX_APP_NUM_ENTRIES_SHIFT      16
+       struct dcbx_app_priority_entry app_pri_tbl[DCBX_MAX_APP_PROTOCOL];
+};
+
+/* FW structure in BE */
+struct dcbx_features {
+       /* PG feature */
+       struct dcbx_ets_feature ets;
+       /* PFC feature */
+       u32 pfc;
+#define DCBX_PFC_PRI_EN_BITMAP_MASK             0x000000ff
+#define DCBX_PFC_PRI_EN_BITMAP_SHIFT            0
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_0            0x01
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_1            0x02
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_2            0x04
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_3            0x08
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_4            0x10
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_5            0x20
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_6            0x40
+#define DCBX_PFC_PRI_EN_BITMAP_PRI_7            0x80
+
+#define DCBX_PFC_FLAGS_MASK                     0x0000ff00
+#define DCBX_PFC_FLAGS_SHIFT                    8
+#define DCBX_PFC_CAPS_MASK                      0x00000f00
+#define DCBX_PFC_CAPS_SHIFT                     8
+#define DCBX_PFC_MBC_MASK                       0x00004000
+#define DCBX_PFC_MBC_SHIFT                      14
+#define DCBX_PFC_WILLING_MASK                   0x00008000
+#define DCBX_PFC_WILLING_SHIFT                  15
+#define DCBX_PFC_ENABLED_MASK                   0x00010000
+#define DCBX_PFC_ENABLED_SHIFT                  16
+#define DCBX_PFC_ERROR_MASK                     0x00020000
+#define DCBX_PFC_ERROR_SHIFT                    17
+
+       /* APP feature */
+       struct dcbx_app_priority_feature app;
+};
+
+struct dcbx_local_params {
+       u32 config;
+#define DCBX_CONFIG_VERSION_MASK            0x00000003
+#define DCBX_CONFIG_VERSION_SHIFT           0
+#define DCBX_CONFIG_VERSION_DISABLED        0
+#define DCBX_CONFIG_VERSION_IEEE            1
+#define DCBX_CONFIG_VERSION_CEE             2
+
+       u32 flags;
+       struct dcbx_features features;
+};
+
+struct dcbx_mib {
+       u32 prefix_seq_num;
+       u32 flags;
+       /*
+        * #define DCBX_CONFIG_VERSION_MASK            0x00000003
+        * #define DCBX_CONFIG_VERSION_SHIFT           0
+        * #define DCBX_CONFIG_VERSION_DISABLED        0
+        * #define DCBX_CONFIG_VERSION_IEEE            1
+        * #define DCBX_CONFIG_VERSION_CEE             2
+        */
+       struct dcbx_features features;
+       u32 suffix_seq_num;
+};
+
+struct lldp_system_tlvs_buffer_s {
+       u16 valid;
+       u16 length;
+       u32 data[MAX_SYSTEM_LLDP_TLV_DATA];
+};
+
 /**************************************/
 /*                                    */
 /*     P U B L I C      G L O B A L   */
@@ -386,6 +564,16 @@ struct public_port {
 
        u32 link_change_count;
 
+       /* LLDP params */
+       struct lldp_config_params_s lldp_config_params[LLDP_MAX_LLDP_AGENTS];
+       struct lldp_status_params_s lldp_status_params[LLDP_MAX_LLDP_AGENTS];
+       struct lldp_system_tlvs_buffer_s system_lldp_tlvs_buf;
+
+       /* DCBX related MIB */
+       struct dcbx_local_params local_admin_dcbx_mib;
+       struct dcbx_mib remote_dcbx_mib;
+       struct dcbx_mib operational_dcbx_mib;
+
        /* FC_NPIV table offset & size in NVRAM value of 0 means not present */
        u32 fc_npiv_nvram_tbl_addr;
        u32 fc_npiv_nvram_tbl_size;
@@ -631,6 +819,9 @@ struct public_drv_mb {
        /*        - DONT_CARE - Don't flap the link if up */
 #define DRV_MSG_CODE_LINK_RESET                        0x23000000
 
+       /* Vitaly: LLDP commands */
+#define DRV_MSG_CODE_SET_LLDP                   0x24000000
+#define DRV_MSG_CODE_SET_DCBX                   0x25000000
        /* OneView feature driver HSI */
 #define DRV_MSG_CODE_OV_UPDATE_CURR_CFG                0x26000000
 #define DRV_MSG_CODE_OV_UPDATE_BUS_NUM         0x27000000
@@ -702,6 +893,14 @@ struct public_drv_mb {
 #define DRV_MB_PARAM_INIT_PHY_FORCE            0x00000001
 #define DRV_MB_PARAM_INIT_PHY_DONT_CARE                0x00000002
 
+       /* LLDP / DCBX params */
+#define DRV_MB_PARAM_LLDP_SEND_MASK            0x00000001
+#define DRV_MB_PARAM_LLDP_SEND_SHIFT           0
+#define DRV_MB_PARAM_LLDP_AGENT_MASK           0x00000006
+#define DRV_MB_PARAM_LLDP_AGENT_SHIFT          1
+#define DRV_MB_PARAM_DCBX_NOTIFY_MASK          0x00000008
+#define DRV_MB_PARAM_DCBX_NOTIFY_SHIFT         3
+
 #define DRV_MB_PARAM_NIG_DRAIN_PERIOD_MS_MASK  0x000000FF
 #define DRV_MB_PARAM_NIG_DRAIN_PERIOD_MS_SHIFT 0
 
@@ -808,6 +1007,9 @@ struct public_drv_mb {
 #define FW_MSG_CODE_INIT_PHY_DONE              0x21200000
 #define FW_MSG_CODE_INIT_PHY_ERR_INVALID_ARGS  0x21300000
 #define FW_MSG_CODE_LINK_RESET_DONE            0x23000000
+#define FW_MSG_CODE_SET_LLDP_DONE               0x24000000
+#define FW_MSG_CODE_SET_LLDP_UNSUPPORTED_AGENT  0x24010000
+#define FW_MSG_CODE_SET_DCBX_DONE               0x25000000
 #define FW_MSG_CODE_UPDATE_CURR_CFG_DONE        0x26000000
 #define FW_MSG_CODE_UPDATE_BUS_NUM_DONE         0x27000000
 #define FW_MSG_CODE_UPDATE_BOOT_PROGRESS_DONE   0x28000000
@@ -918,6 +1120,9 @@ enum MFW_DRV_MSG_TYPE {
        MFW_DRV_MSG_LINK_CHANGE,
        MFW_DRV_MSG_FLR_FW_ACK_FAILED,
        MFW_DRV_MSG_VF_DISABLED,
+       MFW_DRV_MSG_LLDP_DATA_UPDATED,
+       MFW_DRV_MSG_DCBX_REMOTE_MIB_UPDATED,
+       MFW_DRV_MSG_DCBX_OPERATIONAL_MIB_UPDATED,
        MFW_DRV_MSG_ERROR_RECOVERY,
        MFW_DRV_MSG_BW_UPDATE,
        MFW_DRV_MSG_S_TAG_UPDATE,
index 907994b..7f1a60d 100644 (file)
@@ -553,6 +553,12 @@ struct nvm_cfg1_port {
 #define NVM_CFG1_PORT_LED_MODE_PHY10                            0xD
 #define NVM_CFG1_PORT_LED_MODE_PHY11                            0xE
 #define NVM_CFG1_PORT_LED_MODE_PHY12                            0xF
+#define NVM_CFG1_PORT_DCBX_MODE_MASK                            0x000F0000
+#define NVM_CFG1_PORT_DCBX_MODE_OFFSET                          16
+#define NVM_CFG1_PORT_DCBX_MODE_DISABLED                        0x0
+#define NVM_CFG1_PORT_DCBX_MODE_IEEE                            0x1
+#define NVM_CFG1_PORT_DCBX_MODE_CEE                             0x2
+#define NVM_CFG1_PORT_DCBX_MODE_DYNAMIC                         0x3
 #define NVM_CFG1_PORT_DEFAULT_ENABLED_PROTOCOLS_MASK            0x00F00000
 #define NVM_CFG1_PORT_DEFAULT_ENABLED_PROTOCOLS_OFFSET          20
 #define NVM_CFG1_PORT_DEFAULT_ENABLED_PROTOCOLS_ETHERNET        0x1