baseband/turbo_sw: scale likelihood ratio input
authorKamil Chalupnik <kamilx.chalupnik@intel.com>
Wed, 9 May 2018 14:23:16 +0000 (16:23 +0200)
committerPablo de Lara <pablo.de.lara.guarch@intel.com>
Thu, 10 May 2018 16:46:20 +0000 (17:46 +0100)
Update Turbo Software driver for Wireless Baseband Device:
- function scaling input LLR values to specific range [-16, 16] added
- new test vectors to check device capabilities added
- release note updated accordingly

Signed-off-by: Kamil Chalupnik <kamilx.chalupnik@intel.com>
Acked-by: Amr Mokhtar <amr.mokhtar@intel.com>
app/test-bbdev/Makefile
app/test-bbdev/test_bbdev_perf.c
app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1190_rm.data [new file with mode: 0644]
app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1194_rm.data [new file with mode: 0644]
app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1196_rm.data [new file with mode: 0644]
app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e272_rm.data [new file with mode: 0644]
doc/guides/rel_notes/release_18_05.rst
doc/guides/tools/testbbdev.rst
drivers/baseband/turbo_sw/bbdev_turbo_software.c
lib/librte_bbdev/rte_bbdev_op.h

index 9aedd77..6da0c8e 100644 (file)
@@ -20,4 +20,6 @@ SRCS-$(CONFIG_RTE_TEST_BBDEV) += test_bbdev.c
 SRCS-$(CONFIG_RTE_TEST_BBDEV) += test_bbdev_perf.c
 SRCS-$(CONFIG_RTE_TEST_BBDEV) += test_bbdev_vector.c
 
+LDLIBS += -lm
+
 include $(RTE_SDK)/mk/rte.app.mk
index 00f3b08..f358083 100644 (file)
@@ -4,6 +4,7 @@
 
 #include <stdio.h>
 #include <inttypes.h>
+#include <math.h>
 
 #include <rte_eal.h>
 #include <rte_common.h>
@@ -609,10 +610,32 @@ allocate_buffers_on_socket(struct rte_bbdev_op_data **buffers, const int len,
        return (*buffers == NULL) ? TEST_FAILED : TEST_SUCCESS;
 }
 
+static void
+limit_input_llr_val_range(struct rte_bbdev_op_data *input_ops,
+               uint16_t n, int8_t max_llr_modulus)
+{
+       uint16_t i, byte_idx;
+
+       for (i = 0; i < n; ++i) {
+               struct rte_mbuf *m = input_ops[i].data;
+               while (m != NULL) {
+                       int8_t *llr = rte_pktmbuf_mtod_offset(m, int8_t *,
+                                       input_ops[i].offset);
+                       for (byte_idx = 0; byte_idx < input_ops[i].length;
+                                       ++byte_idx)
+                               llr[byte_idx] = round((double)max_llr_modulus *
+                                               llr[byte_idx] / INT8_MAX);
+
+                       m = m->next;
+               }
+       }
+}
+
 static int
 fill_queue_buffers(struct test_op_params *op_params,
                struct rte_mempool *in_mp, struct rte_mempool *hard_out_mp,
                struct rte_mempool *soft_out_mp, uint16_t queue_id,
+               const struct rte_bbdev_op_cap *capabilities,
                uint16_t min_alignment, const int socket_id)
 {
        int ret;
@@ -649,6 +672,10 @@ fill_queue_buffers(struct test_op_params *op_params,
                                "Couldn't init rte_bbdev_op_data structs");
        }
 
+       if (test_vector.op_type == RTE_BBDEV_OP_TURBO_DEC)
+               limit_input_llr_val_range(*queue_ops[DATA_INPUT], n,
+                       capabilities->cap.turbo_dec.max_llr_modulus);
+
        return 0;
 }
 
@@ -995,6 +1022,7 @@ run_test_case_on_device(test_case_function *test_case_func, uint8_t dev_id,
        struct active_device *ad;
        unsigned int burst_sz = get_burst_sz();
        enum rte_bbdev_op_type op_type = test_vector.op_type;
+       const struct rte_bbdev_op_cap *capabilities = NULL;
 
        ad = &active_devs[dev_id];
 
@@ -1027,9 +1055,20 @@ run_test_case_on_device(test_case_function *test_case_func, uint8_t dev_id,
                goto fail;
        }
 
-       if (test_vector.op_type == RTE_BBDEV_OP_TURBO_DEC)
+       if (test_vector.op_type == RTE_BBDEV_OP_TURBO_DEC) {
+               /* Find Decoder capabilities */
+               const struct rte_bbdev_op_cap *cap = info.drv.capabilities;
+               while (cap->type != RTE_BBDEV_OP_NONE) {
+                       if (cap->type == RTE_BBDEV_OP_TURBO_DEC) {
+                               capabilities = cap;
+                               break;
+                       }
+               }
+               TEST_ASSERT_NOT_NULL(capabilities,
+                               "Couldn't find Decoder capabilities");
+
                create_reference_dec_op(op_params->ref_dec_op);
-       else if (test_vector.op_type == RTE_BBDEV_OP_TURBO_ENC)
+       else if (test_vector.op_type == RTE_BBDEV_OP_TURBO_ENC)
                create_reference_enc_op(op_params->ref_enc_op);
 
        for (i = 0; i < ad->nb_queues; ++i) {
@@ -1038,6 +1077,7 @@ run_test_case_on_device(test_case_function *test_case_func, uint8_t dev_id,
                                ad->hard_out_mbuf_pool,
                                ad->soft_out_mbuf_pool,
                                ad->queue_ids[i],
+                               capabilities,
                                info.drv.min_alignment,
                                socket_id);
                if (f_ret != TEST_SUCCESS) {
diff --git a/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1190_rm.data b/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1190_rm.data
new file mode 100644 (file)
index 0000000..6221756
--- /dev/null
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation
+
+op_type =
+RTE_BBDEV_OP_TURBO_ENC
+
+input0 =
+0x11D2BCAC, 0x4D
+
+output0 =
+0xD2399179, 0x640EB999, 0x2CBAF577, 0xAF224AE2, 0x9D139927, 0xE6909B29, 0xA25B7F47, 0x2AA224CE,
+0x399179F2, 0x0EB999D2, 0xBAF57764, 0x224AE22C, 0x139927AF, 0x909B299D, 0x5B7F47E6, 0xA224CEA2,
+0x9179F22A, 0xB999D239, 0xF577640E, 0x4AE22CBA, 0x9927AF22, 0x9B299D13, 0x7F47E690, 0x24CEA25B,
+0x79F22AA2, 0x99D23991, 0x77640EB9, 0xE22CBAF5, 0x27AF224A, 0x299D1399, 0x47E6909B, 0xCEA25B7F,
+0xF22AA224, 0xD2399179, 0x640EB999, 0x2CBAF577, 0xAF224AE2, 0x24
+
+e =
+1190
+
+k =
+40
+
+ncb =
+192
+
+rv_index =
+0
+
+code_block_mode =
+1
+
+op_flags =
+RTE_BBDEV_TURBO_RATE_MATCH
+
+expected_status =
+OK
diff --git a/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1194_rm.data b/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1194_rm.data
new file mode 100644 (file)
index 0000000..c569abd
--- /dev/null
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation
+
+op_type =
+RTE_BBDEV_OP_TURBO_ENC
+
+input0 =
+0x11D2BCAC, 0x4D
+
+output0 =
+0xB3E8D6DF, 0xBC8A2889, 0x744E649E, 0x99436EA6, 0x8B6EFD1D, 0xAB889238, 0xE744E6C9, 0x39E4664A,
+0xE8D6DF91, 0x8A2889B3, 0x4E649EBC, 0x436EA674, 0x6EFD1D99, 0x8892388B, 0x44E6C9AB, 0xE4664AE7,
+0xD6DF9139, 0x2889B3E8, 0x649EBC8A, 0x6EA6744E, 0xFD1D9943, 0x92388B6E, 0xE6C9AB88, 0x664AE744,
+0xDF9139E4, 0x89B3E8D6, 0x9EBC8A28, 0xA6744E64, 0x1D99436E, 0x388B6EFD, 0xC9AB8892, 0x4AE744E6,
+0x9139E466, 0xB3E8D6DF, 0xBC8A2889, 0x744E649E, 0x99436EA6, 0xC01D
+
+e =
+1194
+
+k =
+40
+
+ncb =
+192
+
+rv_index =
+2
+
+code_block_mode =
+1
+
+op_flags =
+RTE_BBDEV_TURBO_RATE_MATCH
+
+expected_status =
+OK
diff --git a/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1196_rm.data b/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e1196_rm.data
new file mode 100644 (file)
index 0000000..72be6f5
--- /dev/null
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation
+
+op_type =
+RTE_BBDEV_OP_TURBO_ENC
+
+input0 =
+0x11D2BCAC, 0x4D
+
+output0 =
+0xBC8A2889, 0x744E649E, 0x99436EA6, 0x8B6EFD1D, 0xAB889238, 0xE744E6C9, 0x39E4664A, 0xE8D6DF91,
+0x8A2889B3, 0x4E649EBC, 0x436EA674, 0x6EFD1D99, 0x8892388B, 0x44E6C9AB, 0xE4664AE7, 0xD6DF9139,
+0x2889B3E8, 0x649EBC8A, 0x6EA6744E, 0xFD1D9943, 0x92388B6E, 0xE6C9AB88, 0x664AE744, 0xDF9139E4,
+0x89B3E8D6, 0x9EBC8A28, 0xA6744E64, 0x1D99436E, 0x388B6EFD, 0xC9AB8892, 0x4AE744E6, 0x9139E466,
+0xB3E8D6DF, 0xBC8A2889, 0x744E649E, 0x99436EA6, 0x8B6EFD1D, 0x9038
+
+e =
+1196
+
+k =
+40
+
+ncb =
+192
+
+rv_index =
+3
+
+code_block_mode =
+1
+
+op_flags =
+RTE_BBDEV_TURBO_RATE_MATCH
+
+expected_status =
+OK
diff --git a/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e272_rm.data b/app/test-bbdev/test_vectors/turbo_enc_c1_k40_r0_e272_rm.data
new file mode 100644 (file)
index 0000000..883a76c
--- /dev/null
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2017 Intel Corporation
+
+op_type =
+RTE_BBDEV_OP_TURBO_ENC
+
+input0 =
+0x11d2bcac, 0x4d
+
+output0 =
+0xd2399179, 0x640eb999, 0x2cbaf577, 0xaf224ae2, 0x9d139927, 0xe6909b29, 0xa25b7f47, 0x2aa224ce,
+0x79f2
+
+e =
+272
+
+k =
+40
+
+ncb =
+192
+
+rv_index =
+0
+
+code_block_mode =
+1
+
+op_flags =
+RTE_BBDEV_TURBO_RATE_MATCH
+
+expected_status =
+OK
index 3fdfda8..3d01f39 100644 (file)
@@ -394,6 +394,12 @@ ABI Changes
   sanity fix in the VLAN pattern item (``struct rte_flow_item_vlan``) and
   new transfer attribute (``struct rte_flow_attr``).
 
+**New parameter added to rte_bbdev_op_cap_turbo_dec.**
+
+  A new parameter ``max_llr_modulus`` has been added to
+  ``rte_bbdev_op_cap_turbo_dec`` structure to specify maximal LLR (likelihood
+  ratio) absolute value.
+
 
 Removed Items
 -------------
index 5c7112d..8203787 100644 (file)
@@ -151,6 +151,13 @@ It runs all tests with following vectors:
 
 - ``bbdev_vector_te_default.data``
 
+- ``turbo_enc_c1_k40_r0_e1190_rm.data``
+
+- ``turbo_enc_c1_k40_r0_e1194_rm.data``
+
+- ``turbo_enc_c1_k40_r0_e1196_rm.data``
+
+- ``turbo_enc_c1_k40_r0_e272_rm.data``
 
 .. code-block:: console
 
index 4f46284..9f01abf 100644 (file)
@@ -135,6 +135,7 @@ info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info)
                                        RTE_BBDEV_TURBO_NEG_LLR_1_BIT_IN |
                                        RTE_BBDEV_TURBO_CRC_TYPE_24B |
                                        RTE_BBDEV_TURBO_EARLY_TERMINATION,
+                               .max_llr_modulus = 16,
                                .num_buffers_src = RTE_BBDEV_MAX_CODE_BLOCKS,
                                .num_buffers_hard_out =
                                                RTE_BBDEV_MAX_CODE_BLOCKS,
@@ -578,8 +579,16 @@ process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
 
        /* Rate-matching */
        if (enc->op_flags & RTE_BBDEV_TURBO_RATE_MATCH) {
+               uint8_t mask_id;
+               /* Integer round up division by 8 */
+               uint16_t out_len = (e + 7) >> 3;
+               /* The mask array is indexed using E%8. E is an even number so
+                * there are only 4 possible values.
+                */
+               const uint8_t mask_out[] = {0xFF, 0xC0, 0xF0, 0xFC};
+
                /* get output data starting address */
-               rm_out = (uint8_t *)rte_pktmbuf_append(m_out, (e >> 3));
+               rm_out = (uint8_t *)rte_pktmbuf_append(m_out, out_len);
                if (rm_out == NULL) {
                        op->status |= 1 << RTE_BBDEV_DATA_ERROR;
                        rte_bbdev_log(ERR,
@@ -619,7 +628,7 @@ process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
                rm_req.tin1 = out1;
                rm_req.tin2 = out2;
                rm_resp.output = rm_out;
-               rm_resp.OutputLen = (e >> 3);
+               rm_resp.OutputLen = out_len;
                if (enc->op_flags & RTE_BBDEV_TURBO_RV_INDEX_BYPASS)
                        rm_req.bypass_rvidx = 1;
                else
@@ -630,6 +639,13 @@ process_enc_cb(struct turbo_sw_queue *q, struct rte_bbdev_enc_op *op,
                        rte_bbdev_log(ERR, "Rate matching failed");
                        return;
                }
+
+               /* SW fills an entire last byte even if E%8 != 0. Clear the
+                * superfluous data bits for consistency with HW device.
+                */
+               mask_id = (e & 7) >> 1;
+               rm_out[out_len - 1] &= mask_out[mask_id];
+
                enc->output.length += rm_resp.OutputLen;
        } else {
                /* Rate matching is bypassed */
@@ -806,7 +822,7 @@ remove_nulls_from_circular_buf(const uint8_t *in, uint8_t *out, uint16_t k,
        }
 
        /* Last interlaced row is different - its last byte is the only padding
-        * byte. We can have from 2 up to 26 padding bytes (Nd) per sub-block.
+        * byte. We can have from 4 up to 28 padding bytes (Nd) per sub-block.
         * After interlacing the 1st and 2nd parity sub-blocks we can have 0, 1
         * or 2 padding bytes each time we make a step of 2 * R_SUBBLOCK bytes
         * (moving to another column). 2nd parity sub-block uses the same
@@ -817,10 +833,10 @@ remove_nulls_from_circular_buf(const uint8_t *in, uint8_t *out, uint16_t k,
         * 32nd (31+1) byte, then 64th etc. (step is C_SUBBLOCK == 32) and the
         * last byte will be the first byte from the sub-block:
         * (32 + 32 * (R_SUBBLOCK-1)) % Kw == Kw % Kw == 0. Nd can't  be smaller
-        * than 2 so we know that bytes with ids 0 and 1 must be the padding
-        * bytes. The bytes from the 1st parity sub-block are the bytes from the
-        * 31st column - Nd can't be greater than 26 so we are sure that there
-        * are no padding bytes in 31st column.
+        * than 4 so we know that bytes with ids 0, 1, 2 and 3 must be the
+        * padding bytes. The bytes from the 1st parity sub-block are the bytes
+        * from the 31st column - Nd can't be greater than 28 so we are sure
+        * that there are no padding bytes in 31st column.
         */
        rte_memcpy(&out[out_idx], &in[in_idx], 2 * r_subblock - 1);
 }
@@ -835,7 +851,7 @@ move_padding_bytes(const uint8_t *in, uint8_t *out, uint16_t k,
 
        rte_memcpy(&out[nd], in, d);
        rte_memcpy(&out[nd + kpi + 64], &in[kpi], d);
-       rte_memcpy(&out[nd + 2 * (kpi + 64)], &in[2 * kpi], d);
+       rte_memcpy(&out[(nd - 1) + 2 * (kpi + 64)], &in[2 * kpi], d);
 }
 
 static inline void
index 1a80588..90a688e 100644 (file)
@@ -379,6 +379,10 @@ struct rte_bbdev_op_turbo_enc {
 struct rte_bbdev_op_cap_turbo_dec {
        /**< Flags from rte_bbdev_op_td_flag_bitmasks */
        uint32_t capability_flags;
+       /** Maximal LLR absolute value. Acceptable LLR values lie in range
+        * [-max_llr_modulus, max_llr_modulus].
+        */
+       int8_t max_llr_modulus;
        uint8_t num_buffers_src;  /**< Num input code block buffers */
        /**< Num hard output code block buffers */
        uint8_t num_buffers_hard_out;