net/ngbe: add HW initialization
authorJiawen Wu <jiawenwu@trustnetic.com>
Thu, 8 Jul 2021 09:32:27 +0000 (17:32 +0800)
committerAndrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>
Mon, 12 Jul 2021 15:55:21 +0000 (17:55 +0200)
Initialize the hardware by resetting the hardware in base code.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
drivers/net/ngbe/base/ngbe_dummy.h
drivers/net/ngbe/base/ngbe_hw.c
drivers/net/ngbe/base/ngbe_hw.h
drivers/net/ngbe/base/ngbe_type.h
drivers/net/ngbe/ngbe_ethdev.c

index c9c17dc..3445e74 100644 (file)
@@ -38,6 +38,19 @@ static inline s32 ngbe_rom_validate_checksum_dummy(struct ngbe_hw *TUP0,
 {
        return NGBE_ERR_OPS_DUMMY;
 }
+/* struct ngbe_mac_operations */
+static inline s32 ngbe_mac_init_hw_dummy(struct ngbe_hw *TUP0)
+{
+       return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_reset_hw_dummy(struct ngbe_hw *TUP0)
+{
+       return NGBE_ERR_OPS_DUMMY;
+}
+static inline s32 ngbe_mac_stop_hw_dummy(struct ngbe_hw *TUP0)
+{
+       return NGBE_ERR_OPS_DUMMY;
+}
 static inline s32 ngbe_mac_acquire_swfw_sync_dummy(struct ngbe_hw *TUP0,
                                        u32 TUP1)
 {
@@ -47,13 +60,21 @@ static inline void ngbe_mac_release_swfw_sync_dummy(struct ngbe_hw *TUP0,
                                        u32 TUP1)
 {
 }
+static inline s32 ngbe_mac_init_thermal_ssth_dummy(struct ngbe_hw *TUP0)
+{
+       return NGBE_ERR_OPS_DUMMY;
+}
 static inline void ngbe_init_ops_dummy(struct ngbe_hw *hw)
 {
        hw->bus.set_lan_id = ngbe_bus_set_lan_id_dummy;
        hw->rom.init_params = ngbe_rom_init_params_dummy;
        hw->rom.validate_checksum = ngbe_rom_validate_checksum_dummy;
+       hw->mac.init_hw = ngbe_mac_init_hw_dummy;
+       hw->mac.reset_hw = ngbe_mac_reset_hw_dummy;
+       hw->mac.stop_hw = ngbe_mac_stop_hw_dummy;
        hw->mac.acquire_swfw_sync = ngbe_mac_acquire_swfw_sync_dummy;
        hw->mac.release_swfw_sync = ngbe_mac_release_swfw_sync_dummy;
+       hw->mac.init_thermal_sensor_thresh = ngbe_mac_init_thermal_ssth_dummy;
 }
 
 #endif /* _NGBE_TYPE_DUMMY_H_ */
index a9819e4..446f4b5 100644 (file)
@@ -8,6 +8,133 @@
 #include "ngbe_mng.h"
 #include "ngbe_hw.h"
 
+/**
+ *  ngbe_init_hw - Generic hardware initialization
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize the hardware by resetting the hardware, filling the bus info
+ *  structure and media type, clears all on chip counters, initializes receive
+ *  address registers, multicast table, VLAN filter table, calls routine to set
+ *  up link and flow control settings, and leaves transmit and receive units
+ *  disabled and uninitialized
+ **/
+s32 ngbe_init_hw(struct ngbe_hw *hw)
+{
+       s32 status;
+
+       DEBUGFUNC("ngbe_init_hw");
+
+       /* Reset the hardware */
+       status = hw->mac.reset_hw(hw);
+
+       if (status != 0)
+               DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
+
+       return status;
+}
+
+static void
+ngbe_reset_misc_em(struct ngbe_hw *hw)
+{
+       int i;
+
+       wr32(hw, NGBE_ISBADDRL, hw->isb_dma & 0xFFFFFFFF);
+       wr32(hw, NGBE_ISBADDRH, hw->isb_dma >> 32);
+
+       /* receive packets that size > 2048 */
+       wr32m(hw, NGBE_MACRXCFG,
+               NGBE_MACRXCFG_JUMBO, NGBE_MACRXCFG_JUMBO);
+
+       wr32m(hw, NGBE_FRMSZ, NGBE_FRMSZ_MAX_MASK,
+               NGBE_FRMSZ_MAX(NGBE_FRAME_SIZE_DFT));
+
+       /* clear counters on read */
+       wr32m(hw, NGBE_MACCNTCTL,
+               NGBE_MACCNTCTL_RC, NGBE_MACCNTCTL_RC);
+
+       wr32m(hw, NGBE_RXFCCFG,
+               NGBE_RXFCCFG_FC, NGBE_RXFCCFG_FC);
+       wr32m(hw, NGBE_TXFCCFG,
+               NGBE_TXFCCFG_FC, NGBE_TXFCCFG_FC);
+
+       wr32m(hw, NGBE_MACRXFLT,
+               NGBE_MACRXFLT_PROMISC, NGBE_MACRXFLT_PROMISC);
+
+       wr32m(hw, NGBE_RSTSTAT,
+               NGBE_RSTSTAT_TMRINIT_MASK, NGBE_RSTSTAT_TMRINIT(30));
+
+       /* errata 4: initialize mng flex tbl and wakeup flex tbl*/
+       wr32(hw, NGBE_MNGFLEXSEL, 0);
+       for (i = 0; i < 16; i++) {
+               wr32(hw, NGBE_MNGFLEXDWL(i), 0);
+               wr32(hw, NGBE_MNGFLEXDWH(i), 0);
+               wr32(hw, NGBE_MNGFLEXMSK(i), 0);
+       }
+       wr32(hw, NGBE_LANFLEXSEL, 0);
+       for (i = 0; i < 16; i++) {
+               wr32(hw, NGBE_LANFLEXDWL(i), 0);
+               wr32(hw, NGBE_LANFLEXDWH(i), 0);
+               wr32(hw, NGBE_LANFLEXMSK(i), 0);
+       }
+
+       /* set pause frame dst mac addr */
+       wr32(hw, NGBE_RXPBPFCDMACL, 0xC2000001);
+       wr32(hw, NGBE_RXPBPFCDMACH, 0x0180);
+
+       wr32(hw, NGBE_MDIOMODE, 0xF);
+
+       wr32m(hw, NGBE_GPIE, NGBE_GPIE_MSIX, NGBE_GPIE_MSIX);
+
+       if ((hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_M88E1512_SFP ||
+               (hw->sub_system_id & NGBE_OEM_MASK) == NGBE_LY_YT8521S_SFP) {
+               /* gpio0 is used to power on/off control*/
+               wr32(hw, NGBE_GPIODIR, NGBE_GPIODIR_DDR(1));
+               wr32(hw, NGBE_GPIODATA, NGBE_GPIOBIT_0);
+       }
+
+       hw->mac.init_thermal_sensor_thresh(hw);
+
+       /* enable mac transmitter */
+       wr32m(hw, NGBE_MACTXCFG, NGBE_MACTXCFG_TE, NGBE_MACTXCFG_TE);
+
+       /* sellect GMII */
+       wr32m(hw, NGBE_MACTXCFG,
+               NGBE_MACTXCFG_SPEED_MASK, NGBE_MACTXCFG_SPEED_1G);
+
+       for (i = 0; i < 4; i++)
+               wr32m(hw, NGBE_IVAR(i), 0x80808080, 0);
+}
+
+/**
+ *  ngbe_reset_hw_em - Perform hardware reset
+ *  @hw: pointer to hardware structure
+ *
+ *  Resets the hardware by resetting the transmit and receive units, masks
+ *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)
+ *  reset.
+ **/
+s32 ngbe_reset_hw_em(struct ngbe_hw *hw)
+{
+       s32 status;
+
+       DEBUGFUNC("ngbe_reset_hw_em");
+
+       /* Call adapter stop to disable tx/rx and clear interrupts */
+       status = hw->mac.stop_hw(hw);
+       if (status != 0)
+               return status;
+
+       wr32(hw, NGBE_RST, NGBE_RST_LAN(hw->bus.lan_id));
+       ngbe_flush(hw);
+       msec_delay(50);
+
+       ngbe_reset_misc_em(hw);
+
+       msec_delay(50);
+
+       return status;
+}
+
 /**
  *  ngbe_set_lan_id_multi_port - Set LAN id for PCIe multiple port devices
  *  @hw: pointer to the HW structure
@@ -27,6 +154,57 @@ void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw)
        bus->func = bus->lan_id;
 }
 
+/**
+ *  ngbe_stop_hw - Generic stop Tx/Rx units
+ *  @hw: pointer to hardware structure
+ *
+ *  Sets the adapter_stopped flag within ngbe_hw struct. Clears interrupts,
+ *  disables transmit and receive units. The adapter_stopped flag is used by
+ *  the shared code and drivers to determine if the adapter is in a stopped
+ *  state and should not touch the hardware.
+ **/
+s32 ngbe_stop_hw(struct ngbe_hw *hw)
+{
+       u32 reg_val;
+       u16 i;
+
+       DEBUGFUNC("ngbe_stop_hw");
+
+       /*
+        * Set the adapter_stopped flag so other driver functions stop touching
+        * the hardware
+        */
+       hw->adapter_stopped = true;
+
+       /* Disable the receive unit */
+       ngbe_disable_rx(hw);
+
+       /* Clear interrupt mask to stop interrupts from being generated */
+       wr32(hw, NGBE_IENMISC, 0);
+       wr32(hw, NGBE_IMS(0), NGBE_IMS_MASK);
+
+       /* Clear any pending interrupts, flush previous writes */
+       wr32(hw, NGBE_ICRMISC, NGBE_ICRMISC_MASK);
+       wr32(hw, NGBE_ICR(0), NGBE_ICR_MASK);
+
+       /* Disable the transmit unit.  Each queue must be disabled. */
+       for (i = 0; i < hw->mac.max_tx_queues; i++)
+               wr32(hw, NGBE_TXCFG(i), NGBE_TXCFG_FLUSH);
+
+       /* Disable the receive unit by stopping each queue */
+       for (i = 0; i < hw->mac.max_rx_queues; i++) {
+               reg_val = rd32(hw, NGBE_RXCFG(i));
+               reg_val &= ~NGBE_RXCFG_ENA;
+               wr32(hw, NGBE_RXCFG(i), reg_val);
+       }
+
+       /* flush all queues disables */
+       ngbe_flush(hw);
+       msec_delay(2);
+
+       return 0;
+}
+
 /**
  *  ngbe_acquire_swfw_sync - Acquire SWFW semaphore
  *  @hw: pointer to hardware structure
@@ -98,6 +276,54 @@ void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask)
        ngbe_release_eeprom_semaphore(hw);
 }
 
+/**
+ *  ngbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
+ *  @hw: pointer to hardware structure
+ *
+ *  Inits the thermal sensor thresholds according to the NVM map
+ *  and save off the threshold and location values into mac.thermal_sensor_data
+ **/
+s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw)
+{
+       struct ngbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;
+
+       DEBUGFUNC("ngbe_init_thermal_sensor_thresh");
+
+       memset(data, 0, sizeof(struct ngbe_thermal_sensor_data));
+
+       if (hw->bus.lan_id != 0)
+               return NGBE_NOT_IMPLEMENTED;
+
+       wr32(hw, NGBE_TSINTR,
+               NGBE_TSINTR_AEN | NGBE_TSINTR_DEN);
+       wr32(hw, NGBE_TSEN, NGBE_TSEN_ENA);
+
+
+       data->sensor[0].alarm_thresh = 115;
+       wr32(hw, NGBE_TSATHRE, 0x344);
+       data->sensor[0].dalarm_thresh = 110;
+       wr32(hw, NGBE_TSDTHRE, 0x330);
+
+       return 0;
+}
+
+void ngbe_disable_rx(struct ngbe_hw *hw)
+{
+       u32 pfdtxgswc;
+
+       pfdtxgswc = rd32(hw, NGBE_PSRCTL);
+       if (pfdtxgswc & NGBE_PSRCTL_LBENA) {
+               pfdtxgswc &= ~NGBE_PSRCTL_LBENA;
+               wr32(hw, NGBE_PSRCTL, pfdtxgswc);
+               hw->mac.set_lben = true;
+       } else {
+               hw->mac.set_lben = false;
+       }
+
+       wr32m(hw, NGBE_PBRXCTL, NGBE_PBRXCTL_ENA, 0);
+       wr32m(hw, NGBE_MACRXCFG, NGBE_MACRXCFG_ENA, 0);
+}
+
 /**
  *  ngbe_set_mac_type - Sets MAC type
  *  @hw: pointer to the HW structure
@@ -216,13 +442,22 @@ s32 ngbe_init_ops_pf(struct ngbe_hw *hw)
        bus->set_lan_id = ngbe_set_lan_id_multi_port;
 
        /* MAC */
+       mac->init_hw = ngbe_init_hw;
+       mac->reset_hw = ngbe_reset_hw_em;
+       mac->stop_hw = ngbe_stop_hw;
        mac->acquire_swfw_sync = ngbe_acquire_swfw_sync;
        mac->release_swfw_sync = ngbe_release_swfw_sync;
 
+       /* Manageability interface */
+       mac->init_thermal_sensor_thresh = ngbe_init_thermal_sensor_thresh;
+
        /* EEPROM */
        rom->init_params = ngbe_init_eeprom_params;
        rom->validate_checksum = ngbe_validate_eeprom_checksum_em;
 
+       mac->max_rx_queues      = NGBE_EM_MAX_RX_QUEUES;
+       mac->max_tx_queues      = NGBE_EM_MAX_TX_QUEUES;
+
        return 0;
 }
 
index a7b80f8..207d4b2 100644 (file)
@@ -8,11 +8,20 @@
 
 #include "ngbe_type.h"
 
+#define NGBE_EM_MAX_TX_QUEUES 8
+#define NGBE_EM_MAX_RX_QUEUES 8
+
+s32 ngbe_init_hw(struct ngbe_hw *hw);
+s32 ngbe_reset_hw_em(struct ngbe_hw *hw);
+s32 ngbe_stop_hw(struct ngbe_hw *hw);
+
 void ngbe_set_lan_id_multi_port(struct ngbe_hw *hw);
 
 s32 ngbe_acquire_swfw_sync(struct ngbe_hw *hw, u32 mask);
 void ngbe_release_swfw_sync(struct ngbe_hw *hw, u32 mask);
 
+s32 ngbe_init_thermal_sensor_thresh(struct ngbe_hw *hw);
+void ngbe_disable_rx(struct ngbe_hw *hw);
 s32 ngbe_init_shared_code(struct ngbe_hw *hw);
 s32 ngbe_set_mac_type(struct ngbe_hw *hw);
 s32 ngbe_init_ops_pf(struct ngbe_hw *hw);
index 689184b..9741cb7 100644 (file)
@@ -6,10 +6,25 @@
 #ifndef _NGBE_TYPE_H_
 #define _NGBE_TYPE_H_
 
+#define NGBE_FRAME_SIZE_DFT       (1522) /* Default frame size, +FCS */
+
+#define NGBE_ALIGN             128 /* as intel did */
+#define NGBE_ISB_SIZE          16
+
 #include "ngbe_status.h"
 #include "ngbe_osdep.h"
 #include "ngbe_devids.h"
 
+struct ngbe_thermal_diode_data {
+       s16 temp;
+       s16 alarm_thresh;
+       s16 dalarm_thresh;
+};
+
+struct ngbe_thermal_sensor_data {
+       struct ngbe_thermal_diode_data sensor[1];
+};
+
 enum ngbe_eeprom_type {
        ngbe_eeprom_unknown = 0,
        ngbe_eeprom_spi,
@@ -71,9 +86,20 @@ struct ngbe_rom_info {
 };
 
 struct ngbe_mac_info {
+       s32 (*init_hw)(struct ngbe_hw *hw);
+       s32 (*reset_hw)(struct ngbe_hw *hw);
+       s32 (*stop_hw)(struct ngbe_hw *hw);
        s32 (*acquire_swfw_sync)(struct ngbe_hw *hw, u32 mask);
        void (*release_swfw_sync)(struct ngbe_hw *hw, u32 mask);
+
+       /* Manageability interface */
+       s32 (*init_thermal_sensor_thresh)(struct ngbe_hw *hw);
+
        enum ngbe_mac_type type;
+       u32 max_tx_queues;
+       u32 max_rx_queues;
+       struct ngbe_thermal_sensor_data  thermal_sensor_data;
+       bool set_lben;
 };
 
 struct ngbe_phy_info {
@@ -92,6 +118,10 @@ struct ngbe_hw {
        u16 vendor_id;
        u16 sub_device_id;
        u16 sub_system_id;
+       bool adapter_stopped;
+
+       uint64_t isb_dma;
+       void IOMEM *isb_mem;
 
        bool is_pf;
 };
index 4548ddd..db929ac 100644 (file)
@@ -60,6 +60,7 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
 {
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
        struct ngbe_hw *hw = ngbe_dev_hw(eth_dev);
+       const struct rte_memzone *mz;
        int err;
 
        PMD_INIT_FUNC_TRACE();
@@ -76,6 +77,15 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
        ngbe_map_device_id(hw);
        hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
 
+       /* Reserve memory for interrupt status block */
+       mz = rte_eth_dma_zone_reserve(eth_dev, "ngbe_driver", -1,
+               NGBE_ISB_SIZE, NGBE_ALIGN, SOCKET_ID_ANY);
+       if (mz == NULL)
+               return -ENOMEM;
+
+       hw->isb_dma = TMZ_PADDR(mz);
+       hw->isb_mem = TMZ_VADDR(mz);
+
        /* Initialize the shared code (base driver) */
        err = ngbe_init_shared_code(hw);
        if (err != 0) {
@@ -99,6 +109,12 @@ eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
                return -EIO;
        }
 
+       err = hw->mac.init_hw(hw);
+       if (err != 0) {
+               PMD_INIT_LOG(ERR, "Hardware Initialization Failure: %d", err);
+               return -EIO;
+       }
+
        return 0;
 }