net/memif: relax load of ring tail for M2S ring

For M2S rings, ring->tail is updated by the sender and eth_memif_tx
function is called in the context of sending thread. The loads in
the sender do not need to synchronize with its own stores.

Fixes: a2aafb9aa651 ("net/memif: optimize with one-way barrier")
Cc: stable@dpdk.org
Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>

diff --git a/drivers/net/memif/rte_eth_memif.c b/drivers/net/memif/rte_eth_memif.c
index d749b5b..b72e249 100644 (file)
--- a/drivers/net/memif/rte_eth_memif.c
+++ b/drivers/net/memif/rte_eth_memif.c
@@ -585,7 +585,13 @@ eth_memif_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
                n_free = ring_size - slot +
                                __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);
        } else {
-               slot = __atomic_load_n(&ring->tail, __ATOMIC_ACQUIRE);
+               /* For M2S queues ring->tail is updated by the sender and
+                * this function is called in the context of sending thread.
+                * The loads in the sender do not need to synchronize with
+                * its own stores. Hence, the following load can be a
+                * relaxed load.
+                */
+               slot = __atomic_load_n(&ring->tail, __ATOMIC_RELAXED);
                n_free = __atomic_load_n(&ring->head, __ATOMIC_ACQUIRE) - slot;
        }