net/sfc/base: import SFN8xxx family support
authorAndrew Rybchenko <arybchenko@solarflare.com>
Tue, 29 Nov 2016 16:18:43 +0000 (16:18 +0000)
committerFerruh Yigit <ferruh.yigit@intel.com>
Tue, 17 Jan 2017 18:39:25 +0000 (19:39 +0100)
SFN8xxx is the second family based on EF10 architecture.

It has few differences from SFN7xxx adapters family.

EFSYS_OPT_MEDFORD should be enabled to use it.

From Solarflare Communications Inc.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
14 files changed:
drivers/net/sfc/base/ef10_impl.h
drivers/net/sfc/base/efx_check.h
drivers/net/sfc/base/efx_ev.c
drivers/net/sfc/base/efx_filter.c
drivers/net/sfc/base/efx_impl.h
drivers/net/sfc/base/efx_intr.c
drivers/net/sfc/base/efx_mac.c
drivers/net/sfc/base/efx_mcdi.c
drivers/net/sfc/base/efx_nic.c
drivers/net/sfc/base/efx_phy.c
drivers/net/sfc/base/efx_rx.c
drivers/net/sfc/base/efx_tx.c
drivers/net/sfc/base/medford_impl.h [new file with mode: 0644]
drivers/net/sfc/base/medford_nic.c [new file with mode: 0644]

index b901ccc..697e99b 100644 (file)
 extern "C" {
 #endif
 
-#if   EFSYS_OPT_HUNTINGTON
+#if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
+#define        EF10_MAX_PIOBUF_NBUFS   MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
+#elif EFSYS_OPT_HUNTINGTON
 #define        EF10_MAX_PIOBUF_NBUFS   HUNT_PIOBUF_NBUFS
+#elif EFSYS_OPT_MEDFORD
+#define        EF10_MAX_PIOBUF_NBUFS   MEDFORD_PIOBUF_NBUFS
 #endif
 
 /*
index 63c809c..ef88645 100644 (file)
 
 #if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
 /* Support adapters with missing static config (for factory use only) */
+# if !EFSYS_OPT_MEDFORD
 #  error "ALLOW_UNCONFIGURED_NIC requires MEDFORD"
+# endif
 #endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
 
 #endif /* _SYS_EFX_CHECK_H */
index 65094c1..8cb78be 100644 (file)
@@ -134,6 +134,12 @@ efx_ev_init(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               eevop = &__efx_ev_ef10_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                EFSYS_ASSERT(0);
                rc = ENOTSUP;
index 47e2ae4..c878b78 100644 (file)
@@ -165,6 +165,12 @@ efx_filter_init(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               efop = &__efx_filter_ef10_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                EFSYS_ASSERT(0);
                rc = ENOTSUP;
index 10ab36b..97057e4 100644 (file)
 #include "hunt_impl.h"
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+#include "medford_impl.h"
+#endif /* EFSYS_OPT_MEDFORD */
+
 #if (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
 #include "ef10_impl.h"
 #endif /* (EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD) */
index 50cf388..f0422d5 100644 (file)
@@ -150,6 +150,12 @@ efx_intr_init(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               eiop = &__efx_intr_ef10_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                EFSYS_ASSERT(B_FALSE);
                rc = ENOTSUP;
index 1d50128..c10c79a 100644 (file)
@@ -516,6 +516,13 @@ efx_mac_select(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               emop = &__efx_ef10_mac_ops;
+               type = EFX_MAC_MEDFORD;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                rc = EINVAL;
                goto fail1;
index 338ff49..8d91812 100644 (file)
@@ -110,6 +110,12 @@ efx_mcdi_init(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               emcop = &__efx_mcdi_ef10_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                EFSYS_ASSERT(0);
                rc = ENOTSUP;
index 701c6e3..3ce8514 100644 (file)
@@ -74,6 +74,24 @@ efx_family(
                        return (0);
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+               case EFX_PCI_DEVID_MEDFORD_PF_UNINIT:
+                       /*
+                        * Hardware default for PF0 of uninitialised Medford.
+                        * manftest must be able to cope with this device id.
+                        */
+                       *efp = EFX_FAMILY_MEDFORD;
+                       return (0);
+
+               case EFX_PCI_DEVID_MEDFORD:
+                       *efp = EFX_FAMILY_MEDFORD;
+                       return (0);
+
+               case EFX_PCI_DEVID_MEDFORD_VF:
+                       *efp = EFX_FAMILY_MEDFORD;
+                       return (0);
+#endif /* EFSYS_OPT_MEDFORD */
+
                case EFX_PCI_DEVID_FALCON:      /* Obsolete, not supported */
                default:
                        break;
@@ -188,6 +206,22 @@ static const efx_nic_ops_t __efx_nic_hunt_ops = {
 
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+
+static const efx_nic_ops_t     __efx_nic_medford_ops = {
+       ef10_nic_probe,                 /* eno_probe */
+       medford_board_cfg,              /* eno_board_cfg */
+       ef10_nic_set_drv_limits,        /* eno_set_drv_limits */
+       ef10_nic_reset,                 /* eno_reset */
+       ef10_nic_init,                  /* eno_init */
+       ef10_nic_get_vi_pool,           /* eno_get_vi_pool */
+       ef10_nic_get_bar_region,        /* eno_get_bar_region */
+       ef10_nic_fini,                  /* eno_fini */
+       ef10_nic_unprobe,               /* eno_unprobe */
+};
+
+#endif /* EFSYS_OPT_MEDFORD */
+
 
        __checkReturn   efx_rc_t
 efx_nic_create(
@@ -246,6 +280,26 @@ efx_nic_create(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               enp->en_enop = &__efx_nic_medford_ops;
+               /*
+                * FW_ASSISTED_TSO omitted as Medford only supports firmware
+                * assisted TSO version 2, not the v1 scheme used on Huntington.
+                */
+               enp->en_features =
+                   EFX_FEATURE_IPV6 |
+                   EFX_FEATURE_LINK_EVENTS |
+                   EFX_FEATURE_PERIODIC_MAC_STATS |
+                   EFX_FEATURE_MCDI |
+                   EFX_FEATURE_MAC_HEADER_FILTERS |
+                   EFX_FEATURE_MCDI_DMA |
+                   EFX_FEATURE_PIO_BUFFERS |
+                   EFX_FEATURE_FW_ASSISTED_TSO_V2 |
+                   EFX_FEATURE_PACKED_STREAM;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                rc = ENOTSUP;
                goto fail2;
index b663cf8..e7e915e 100644 (file)
@@ -78,6 +78,11 @@ efx_phy_probe(
                epop = &__efx_phy_ef10_ops;
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               epop = &__efx_phy_ef10_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
        default:
                rc = ENOTSUP;
                goto fail1;
index 8ca5731..2899a0f 100644 (file)
@@ -152,6 +152,12 @@ efx_rx_init(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               erxop = &__efx_rx_ef10_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                EFSYS_ASSERT(0);
                rc = ENOTSUP;
index ed66695..16834af 100644 (file)
@@ -152,6 +152,29 @@ static const efx_tx_ops_t  __efx_tx_hunt_ops = {
 };
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+static const efx_tx_ops_t      __efx_tx_medford_ops = {
+       ef10_tx_init,                           /* etxo_init */
+       ef10_tx_fini,                           /* etxo_fini */
+       ef10_tx_qcreate,                        /* etxo_qcreate */
+       ef10_tx_qdestroy,                       /* etxo_qdestroy */
+       ef10_tx_qpost,                          /* etxo_qpost */
+       ef10_tx_qpush,                          /* etxo_qpush */
+       ef10_tx_qpace,                          /* etxo_qpace */
+       ef10_tx_qflush,                         /* etxo_qflush */
+       ef10_tx_qenable,                        /* etxo_qenable */
+       ef10_tx_qpio_enable,                    /* etxo_qpio_enable */
+       ef10_tx_qpio_disable,                   /* etxo_qpio_disable */
+       ef10_tx_qpio_write,                     /* etxo_qpio_write */
+       ef10_tx_qpio_post,                      /* etxo_qpio_post */
+       ef10_tx_qdesc_post,                     /* etxo_qdesc_post */
+       ef10_tx_qdesc_dma_create,               /* etxo_qdesc_dma_create */
+       NULL,                                   /* etxo_qdesc_tso_create */
+       ef10_tx_qdesc_tso2_create,              /* etxo_qdesc_tso2_create */
+       ef10_tx_qdesc_vlantci_create,           /* etxo_qdesc_vlantci_create */
+};
+#endif /* EFSYS_OPT_MEDFORD */
+
        __checkReturn   efx_rc_t
 efx_tx_init(
        __in            efx_nic_t *enp)
@@ -185,6 +208,12 @@ efx_tx_init(
                break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
+#if EFSYS_OPT_MEDFORD
+       case EFX_FAMILY_MEDFORD:
+               etxop = &__efx_tx_medford_ops;
+               break;
+#endif /* EFSYS_OPT_MEDFORD */
+
        default:
                EFSYS_ASSERT(0);
                rc = ENOTSUP;
diff --git a/drivers/net/sfc/base/medford_impl.h b/drivers/net/sfc/base/medford_impl.h
new file mode 100644 (file)
index 0000000..de2f5cf
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2015-2016 Solarflare Communications Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * The views and conclusions contained in the software and documentation are
+ * those of the authors and should not be interpreted as representing official
+ * policies, either expressed or implied, of the FreeBSD Project.
+ */
+
+#ifndef        _SYS_MEDFORD_IMPL_H
+#define        _SYS_MEDFORD_IMPL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Alignment requirement for value written to RX WPTR:
+ *  the WPTR must be aligned to an 8 descriptor boundary
+ *
+ * FIXME: Is this the same on Medford as Huntington?
+ */
+#define        MEDFORD_RX_WPTR_ALIGN   8
+
+
+
+#ifndef        ER_EZ_TX_PIOBUF_SIZE
+#define        ER_EZ_TX_PIOBUF_SIZE    4096
+#endif
+
+
+#define        MEDFORD_PIOBUF_NBUFS    (16)
+#define        MEDFORD_PIOBUF_SIZE     (ER_EZ_TX_PIOBUF_SIZE)
+
+#define        MEDFORD_MIN_PIO_ALLOC_SIZE      (MEDFORD_PIOBUF_SIZE / 32)
+
+
+extern __checkReturn   efx_rc_t
+medford_board_cfg(
+       __in            efx_nic_t *enp);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYS_MEDFORD_IMPL_H */
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
new file mode 100644 (file)
index 0000000..6ad68c6
--- /dev/null
@@ -0,0 +1,398 @@
+/*
+ * Copyright (c) 2015-2016 Solarflare Communications Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * The views and conclusions contained in the software and documentation are
+ * those of the authors and should not be interpreted as representing official
+ * policies, either expressed or implied, of the FreeBSD Project.
+ */
+
+#include "efx.h"
+#include "efx_impl.h"
+
+
+#if EFSYS_OPT_MEDFORD
+
+static __checkReturn   efx_rc_t
+efx_mcdi_get_rxdp_config(
+       __in            efx_nic_t *enp,
+       __out           uint32_t *end_paddingp)
+{
+       efx_mcdi_req_t req;
+       uint8_t payload[MAX(MC_CMD_GET_RXDP_CONFIG_IN_LEN,
+                           MC_CMD_GET_RXDP_CONFIG_OUT_LEN)];
+       uint32_t end_padding;
+       efx_rc_t rc;
+
+       memset(payload, 0, sizeof (payload));
+       req.emr_cmd = MC_CMD_GET_RXDP_CONFIG;
+       req.emr_in_buf = payload;
+       req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN;
+       req.emr_out_buf = payload;
+       req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN;
+
+       efx_mcdi_execute(enp, &req);
+       if (req.emr_rc != 0) {
+               rc = req.emr_rc;
+               goto fail1;
+       }
+
+       if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA,
+                                   GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) {
+               /* RX DMA end padding is disabled */
+               end_padding = 0;
+       } else {
+               switch (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA,
+                                           GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) {
+               case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64:
+                       end_padding = 64;
+                       break;
+               case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128:
+                       end_padding = 128;
+                       break;
+               case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256:
+                       end_padding = 256;
+                       break;
+               default:
+                       rc = ENOTSUP;
+                       goto fail2;
+               }
+       }
+
+       *end_paddingp = end_padding;
+
+       return (0);
+
+fail2:
+       EFSYS_PROBE(fail2);
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+       return (rc);
+}
+
+static __checkReturn   efx_rc_t
+medford_nic_get_required_pcie_bandwidth(
+       __in            efx_nic_t *enp,
+       __out           uint32_t *bandwidth_mbpsp)
+{
+       uint32_t port_modes;
+       uint32_t current_mode;
+       uint32_t bandwidth;
+       efx_rc_t rc;
+
+       if ((rc = efx_mcdi_get_port_modes(enp, &port_modes,
+                                   &current_mode)) != 0) {
+               /* No port mode info available. */
+               bandwidth = 0;
+               goto out;
+       }
+
+       if ((rc = ef10_nic_get_port_mode_bandwidth(current_mode,
+                                                   &bandwidth)) != 0)
+               goto fail1;
+
+out:
+       *bandwidth_mbpsp = bandwidth;
+
+       return (0);
+
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+       return (rc);
+}
+
+       __checkReturn   efx_rc_t
+medford_board_cfg(
+       __in            efx_nic_t *enp)
+{
+       efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
+       efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
+       uint8_t mac_addr[6] = { 0 };
+       uint32_t board_type = 0;
+       ef10_link_state_t els;
+       efx_port_t *epp = &(enp->en_port);
+       uint32_t port;
+       uint32_t pf;
+       uint32_t vf;
+       uint32_t mask;
+       uint32_t sysclk, dpcpu_clk;
+       uint32_t base, nvec;
+       uint32_t end_padding;
+       uint32_t bandwidth;
+       efx_rc_t rc;
+
+       /*
+        * FIXME: Likely to be incomplete and incorrect.
+        * Parts of this should be shared with Huntington.
+        */
+
+       if ((rc = efx_mcdi_get_port_assignment(enp, &port)) != 0)
+               goto fail1;
+
+       /*
+        * NOTE: The MCDI protocol numbers ports from zero.
+        * The common code MCDI interface numbers ports from one.
+        */
+       emip->emi_port = port + 1;
+
+       if ((rc = ef10_external_port_mapping(enp, port,
+                   &encp->enc_external_port)) != 0)
+               goto fail2;
+
+       /*
+        * Get PCIe function number from firmware (used for
+        * per-function privilege and dynamic config info).
+        *  - PCIe PF: pf = PF number, vf = 0xffff.
+        *  - PCIe VF: pf = parent PF, vf = VF number.
+        */
+       if ((rc = efx_mcdi_get_function_info(enp, &pf, &vf)) != 0)
+               goto fail3;
+
+       encp->enc_pf = pf;
+       encp->enc_vf = vf;
+
+       /* MAC address for this function */
+       if (EFX_PCI_FUNCTION_IS_PF(encp)) {
+               rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
+#if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
+               /* Disable static config checking for Medford NICs, ONLY
+                * for manufacturing test and setup at the factory, to
+                * allow the static config to be installed.
+                */
+#else /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
+               if ((rc == 0) && (mac_addr[0] & 0x02)) {
+                       /*
+                        * If the static config does not include a global MAC
+                        * address pool then the board may return a locally
+                        * administered MAC address (this should only happen on
+                        * incorrectly programmed boards).
+                        */
+                       rc = EINVAL;
+               }
+#endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
+       } else {
+               rc = efx_mcdi_get_mac_address_vf(enp, mac_addr);
+       }
+       if (rc != 0)
+               goto fail4;
+
+       EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
+
+       /* Board configuration */
+       rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL);
+       if (rc != 0) {
+               /* Unprivileged functions may not be able to read board cfg */
+               if (rc == EACCES)
+                       board_type = 0;
+               else
+                       goto fail5;
+       }
+
+       encp->enc_board_type = board_type;
+       encp->enc_clk_mult = 1; /* not used for Medford */
+
+       /* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */
+       if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
+               goto fail6;
+
+       /* Obtain the default PHY advertised capabilities */
+       if ((rc = ef10_phy_get_link(enp, &els)) != 0)
+               goto fail7;
+       epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
+       epp->ep_adv_cap_mask = els.els_adv_cap_mask;
+
+       /*
+        * Enable firmware workarounds for hardware errata.
+        * Expected responses are:
+        *  - 0 (zero):
+        *      Success: workaround enabled or disabled as requested.
+        *  - MC_CMD_ERR_ENOSYS (reported as ENOTSUP):
+        *      Firmware does not support the MC_CMD_WORKAROUND request.
+        *      (assume that the workaround is not supported).
+        *  - MC_CMD_ERR_ENOENT (reported as ENOENT):
+        *      Firmware does not support the requested workaround.
+        *  - MC_CMD_ERR_EPERM  (reported as EACCES):
+        *      Unprivileged function cannot enable/disable workarounds.
+        *
+        * See efx_mcdi_request_errcode() for MCDI error translations.
+        */
+
+
+       if (EFX_PCI_FUNCTION_IS_VF(encp)) {
+               /*
+                * Interrupt testing does not work for VFs. See bug50084.
+                * FIXME: Does this still  apply to Medford?
+                */
+               encp->enc_bug41750_workaround = B_TRUE;
+       }
+
+       /* Chained multicast is always enabled on Medford */
+       encp->enc_bug26807_workaround = B_TRUE;
+
+       /*
+        * If the bug61265 workaround is enabled, then interrupt holdoff timers
+        * cannot be controlled by timer table writes, so MCDI must be used
+        * (timer table writes can still be used for wakeup timers).
+        */
+       rc = efx_mcdi_set_workaround(enp, MC_CMD_WORKAROUND_BUG61265, B_TRUE,
+           NULL);
+       if ((rc == 0) || (rc == EACCES))
+               encp->enc_bug61265_workaround = B_TRUE;
+       else if ((rc == ENOTSUP) || (rc == ENOENT))
+               encp->enc_bug61265_workaround = B_FALSE;
+       else
+               goto fail8;
+
+       /* Get clock frequencies (in MHz). */
+       if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
+               goto fail9;
+
+       /*
+        * The Medford timer quantum is 1536 dpcpu_clk cycles, documented for
+        * the EV_TMR_VAL field of EV_TIMER_TBL. Scale for MHz and ns units.
+        */
+       encp->enc_evq_timer_quantum_ns = 1536000UL / dpcpu_clk; /* 1536 cycles */
+       encp->enc_evq_timer_max_us = (encp->enc_evq_timer_quantum_ns <<
+                   FRF_CZ_TC_TIMER_VAL_WIDTH) / 1000;
+
+       /* Check capabilities of running datapath firmware */
+       if ((rc = ef10_get_datapath_caps(enp)) != 0)
+               goto fail10;
+
+       /* Alignment for receive packet DMA buffers */
+       encp->enc_rx_buf_align_start = 1;
+
+       /* Get the RX DMA end padding alignment configuration */
+       if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
+               if (rc != EACCES)
+                       goto fail11;
+
+               /* Assume largest tail padding size supported by hardware */
+               end_padding = 256;
+       }
+       encp->enc_rx_buf_align_end = end_padding;
+
+       /* Alignment for WPTR updates */
+       encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN;
+
+       /*
+        * Set resource limits for MC_CMD_ALLOC_VIS. Note that we cannot use
+        * MC_CMD_GET_RESOURCE_LIMITS here as that reports the available
+        * resources (allocated to this PCIe function), which is zero until
+        * after we have allocated VIs.
+        */
+       encp->enc_evq_limit = 1024;
+       encp->enc_rxq_limit = EFX_RXQ_LIMIT_TARGET;
+       encp->enc_txq_limit = EFX_TXQ_LIMIT_TARGET;
+
+       /*
+        * The maximum supported transmit queue size is 2048. TXQs with 4096
+        * descriptors are not supported as the top bit is used for vfifo
+        * stuffing.
+        */
+       encp->enc_txq_max_ndescs = 2048;
+
+       encp->enc_buftbl_limit = 0xFFFFFFFF;
+
+       encp->enc_piobuf_limit = MEDFORD_PIOBUF_NBUFS;
+       encp->enc_piobuf_size = MEDFORD_PIOBUF_SIZE;
+       encp->enc_piobuf_min_alloc_size = MEDFORD_MIN_PIO_ALLOC_SIZE;
+
+       /*
+        * Get the current privilege mask. Note that this may be modified
+        * dynamically, so this value is informational only. DO NOT use
+        * the privilege mask to check for sufficient privileges, as that
+        * can result in time-of-check/time-of-use bugs.
+        */
+       if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
+               goto fail12;
+       encp->enc_privilege_mask = mask;
+
+       /* Get interrupt vector limits */
+       if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
+               if (EFX_PCI_FUNCTION_IS_PF(encp))
+                       goto fail13;
+
+               /* Ignore error (cannot query vector limits from a VF). */
+               base = 0;
+               nvec = 1024;
+       }
+       encp->enc_intr_vec_base = base;
+       encp->enc_intr_limit = nvec;
+
+       /*
+        * Maximum number of bytes into the frame the TCP header can start for
+        * firmware assisted TSO to work.
+        */
+       encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
+
+       /*
+        * Medford stores a single global copy of VPD, not per-PF as on
+        * Huntington.
+        */
+       encp->enc_vpd_is_global = B_TRUE;
+
+       rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);
+       if (rc != 0)
+               goto fail14;
+       encp->enc_required_pcie_bandwidth_mbps = bandwidth;
+       encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
+
+       return (0);
+
+fail14:
+       EFSYS_PROBE(fail14);
+fail13:
+       EFSYS_PROBE(fail13);
+fail12:
+       EFSYS_PROBE(fail12);
+fail11:
+       EFSYS_PROBE(fail11);
+fail10:
+       EFSYS_PROBE(fail10);
+fail9:
+       EFSYS_PROBE(fail9);
+fail8:
+       EFSYS_PROBE(fail8);
+fail7:
+       EFSYS_PROBE(fail7);
+fail6:
+       EFSYS_PROBE(fail6);
+fail5:
+       EFSYS_PROBE(fail5);
+fail4:
+       EFSYS_PROBE(fail4);
+fail3:
+       EFSYS_PROBE(fail3);
+fail2:
+       EFSYS_PROBE(fail2);
+fail1:
+       EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+       return (rc);
+}
+
+#endif /* EFSYS_OPT_MEDFORD */