eal/arm64: update CPU flags
authorWei Hu (Xavier) <xavier.huwei@huawei.com>
Wed, 19 Aug 2020 10:56:37 +0000 (18:56 +0800)
committerThomas Monjalon <thomas@monjalon.net>
Tue, 13 Oct 2020 15:52:11 +0000 (17:52 +0200)
ARM64 Linux kernel updated the CPU flags using the HWCAP scheme.
The related marco definition can be found in linux kernel:
  arch/arm64/include/uapi/asm/hwcap.h

This patch incorporates those changes to the EAL library.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
lib/librte_eal/arm/include/rte_cpuflags_64.h
lib/librte_eal/arm/rte_cpuflags.c

index 95cc014..aa7a56d 100644 (file)
@@ -22,6 +22,19 @@ enum rte_cpu_flag_t {
        RTE_CPUFLAG_SHA2,
        RTE_CPUFLAG_CRC32,
        RTE_CPUFLAG_ATOMICS,
+       RTE_CPUFLAG_SVE,
+       RTE_CPUFLAG_SVE2,
+       RTE_CPUFLAG_SVEAES,
+       RTE_CPUFLAG_SVEPMULL,
+       RTE_CPUFLAG_SVEBITPERM,
+       RTE_CPUFLAG_SVESHA3,
+       RTE_CPUFLAG_SVESM4,
+       RTE_CPUFLAG_FLAGM2,
+       RTE_CPUFLAG_FRINT,
+       RTE_CPUFLAG_SVEI8MM,
+       RTE_CPUFLAG_SVEF32MM,
+       RTE_CPUFLAG_SVEF64MM,
+       RTE_CPUFLAG_SVEBF16,
        RTE_CPUFLAG_AARCH64,
        /* The last item */
        RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
index caf3dc8..7b257b7 100644 (file)
@@ -95,6 +95,19 @@ const struct feature_entry rte_cpu_feature_table[] = {
        FEAT_DEF(SHA2,          REG_HWCAP,    6)
        FEAT_DEF(CRC32,         REG_HWCAP,    7)
        FEAT_DEF(ATOMICS,       REG_HWCAP,    8)
+       FEAT_DEF(SVE,           REG_HWCAP,    22)
+       FEAT_DEF(SVE2,          REG_HWCAP2,   1)
+       FEAT_DEF(SVEAES,        REG_HWCAP2,   2)
+       FEAT_DEF(SVEPMULL,      REG_HWCAP2,   3)
+       FEAT_DEF(SVEBITPERM,    REG_HWCAP2,   4)
+       FEAT_DEF(SVESHA3,       REG_HWCAP2,   5)
+       FEAT_DEF(SVESM4,        REG_HWCAP2,   6)
+       FEAT_DEF(FLAGM2,        REG_HWCAP2,   7)
+       FEAT_DEF(FRINT,         REG_HWCAP2,   8)
+       FEAT_DEF(SVEI8MM,       REG_HWCAP2,   9)
+       FEAT_DEF(SVEF32MM,      REG_HWCAP2,   10)
+       FEAT_DEF(SVEF64MM,      REG_HWCAP2,   11)
+       FEAT_DEF(SVEBF16,       REG_HWCAP2,   12)
        FEAT_DEF(AARCH64,       REG_PLATFORM, 1)
 };
 #endif /* RTE_ARCH */