net/bnxt: support 200G link speed
authorKalesh AP <kalesh-anakkur.purayil@broadcom.com>
Wed, 13 May 2020 04:51:25 +0000 (10:21 +0530)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 18 May 2020 18:35:57 +0000 (20:35 +0200)
When the driver is loaded on a 200G NIC, the port speed is not
displayed correctly. Parse the 200G speed before displaying it.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
drivers/net/bnxt/bnxt_ethdev.c
drivers/net/bnxt/bnxt_hwrm.c

index ee0550b..2ba9d6b 100644 (file)
@@ -693,6 +693,8 @@ static uint32_t bnxt_get_speed_capabilities(struct bnxt *bp)
                speed_capa |= ETH_LINK_SPEED_50G;
        if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB)
                speed_capa |= ETH_LINK_SPEED_100G;
+       if (link_speed & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_200GB)
+               speed_capa |= ETH_LINK_SPEED_200G;
 
        if (bp->link_info.auto_mode == HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE)
                speed_capa |= ETH_LINK_SPEED_FIXED;
index ef65107..77a9110 100644 (file)
@@ -2762,6 +2762,10 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed)
                eth_link_speed =
                        HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB;
                break;
+       case ETH_LINK_SPEED_200G:
+               eth_link_speed =
+                       HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_200GB;
+               break;
        default:
                PMD_DRV_LOG(ERR,
                        "Unsupported link speed %d; default to AUTO\n",
@@ -2774,7 +2778,8 @@ static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed)
 #define BNXT_SUPPORTED_SPEEDS (ETH_LINK_SPEED_100M | ETH_LINK_SPEED_100M_HD | \
                ETH_LINK_SPEED_1G | ETH_LINK_SPEED_2_5G | \
                ETH_LINK_SPEED_10G | ETH_LINK_SPEED_20G | ETH_LINK_SPEED_25G | \
-               ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G | ETH_LINK_SPEED_100G)
+               ETH_LINK_SPEED_40G | ETH_LINK_SPEED_50G | \
+               ETH_LINK_SPEED_100G | ETH_LINK_SPEED_200G)
 
 static int bnxt_valid_link_speed(uint32_t link_speed, uint16_t port_id)
 {
@@ -2840,6 +2845,8 @@ bnxt_parse_eth_link_speed_mask(struct bnxt *bp, uint32_t link_speed)
                ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB;
        if (link_speed & ETH_LINK_SPEED_100G)
                ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB;
+       if (link_speed & ETH_LINK_SPEED_200G)
+               ret |= HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_200GB;
        return ret;
 }
 
@@ -2875,6 +2882,9 @@ static uint32_t bnxt_parse_hw_link_speed(uint16_t hw_link_speed)
        case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB:
                eth_link_speed = ETH_SPEED_NUM_100G;
                break;
+       case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_200GB:
+               eth_link_speed = ETH_SPEED_NUM_200G;
+               break;
        case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB:
        default:
                PMD_DRV_LOG(ERR, "HWRM link speed %d not defined\n",