net/sfc: move EF10 Rx event parser to shared header
authorAndrew Rybchenko <arybchenko@solarflare.com>
Thu, 19 Apr 2018 11:36:51 +0000 (12:36 +0100)
committerFerruh Yigit <ferruh.yigit@intel.com>
Fri, 27 Apr 2018 17:00:58 +0000 (18:00 +0100)
Equal stride super-buffer Rx datapath will use it as well.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
drivers/net/sfc/sfc_ef10_rx.c
drivers/net/sfc/sfc_ef10_rx_ev.h [new file with mode: 0644]

index f8eb3c1..7560891 100644 (file)
@@ -25,6 +25,7 @@
 #include "sfc_dp_rx.h"
 #include "sfc_kvargs.h"
 #include "sfc_ef10.h"
+#include "sfc_ef10_rx_ev.h"
 
 #define sfc_ef10_rx_err(dpq, ...) \
        SFC_DP_LOG(SFC_KVARG_DATAPATH_EF10, ERR, dpq, __VA_ARGS__)
@@ -198,143 +199,6 @@ sfc_ef10_rx_prepared(struct sfc_ef10_rxq *rxq, struct rte_mbuf **rx_pkts,
        return n_rx_pkts;
 }
 
-static void
-sfc_ef10_rx_ev_to_offloads(const efx_qword_t rx_ev, struct rte_mbuf *m,
-                          uint64_t ol_mask)
-{
-       uint32_t tun_ptype = 0;
-       /* Which event bit is mapped to PKT_RX_IP_CKSUM_* */
-       int8_t ip_csum_err_bit;
-       /* Which event bit is mapped to PKT_RX_L4_CKSUM_* */
-       int8_t l4_csum_err_bit;
-       uint32_t l2_ptype = 0;
-       uint32_t l3_ptype = 0;
-       uint32_t l4_ptype = 0;
-       uint64_t ol_flags = 0;
-
-       if (unlikely(EFX_TEST_QWORD_BIT(rx_ev, ESF_DZ_RX_PARSE_INCOMPLETE_LBN)))
-               goto done;
-
-       switch (EFX_QWORD_FIELD(rx_ev, ESF_EZ_RX_ENCAP_HDR)) {
-       default:
-               /* Unexpected encapsulation tag class */
-               SFC_ASSERT(false);
-               /* FALLTHROUGH */
-       case ESE_EZ_ENCAP_HDR_NONE:
-               break;
-       case ESE_EZ_ENCAP_HDR_VXLAN:
-               /*
-                * It is definitely UDP, but we have no information
-                * about IPv4 vs IPv6 and VLAN tagging.
-                */
-               tun_ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP;
-               break;
-       case ESE_EZ_ENCAP_HDR_GRE:
-               /*
-                * We have no information about IPv4 vs IPv6 and VLAN tagging.
-                */
-               tun_ptype = RTE_PTYPE_TUNNEL_NVGRE;
-               break;
-       }
-
-       if (tun_ptype == 0) {
-               ip_csum_err_bit = ESF_DZ_RX_IPCKSUM_ERR_LBN;
-               l4_csum_err_bit = ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN;
-       } else {
-               ip_csum_err_bit = ESF_EZ_RX_IP_INNER_CHKSUM_ERR_LBN;
-               l4_csum_err_bit = ESF_EZ_RX_TCP_UDP_INNER_CHKSUM_ERR_LBN;
-               if (unlikely(EFX_TEST_QWORD_BIT(rx_ev,
-                                               ESF_DZ_RX_IPCKSUM_ERR_LBN)))
-                       ol_flags |= PKT_RX_EIP_CKSUM_BAD;
-       }
-
-       switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_ETH_TAG_CLASS)) {
-       case ESE_DZ_ETH_TAG_CLASS_NONE:
-               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER :
-                       RTE_PTYPE_INNER_L2_ETHER;
-               break;
-       case ESE_DZ_ETH_TAG_CLASS_VLAN1:
-               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER_VLAN :
-                       RTE_PTYPE_INNER_L2_ETHER_VLAN;
-               break;
-       case ESE_DZ_ETH_TAG_CLASS_VLAN2:
-               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER_QINQ :
-                       RTE_PTYPE_INNER_L2_ETHER_QINQ;
-               break;
-       default:
-               /* Unexpected Eth tag class */
-               SFC_ASSERT(false);
-       }
-
-       switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_L3_CLASS)) {
-       case ESE_DZ_L3_CLASS_IP4_FRAG:
-               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_FRAG :
-                       RTE_PTYPE_INNER_L4_FRAG;
-               /* FALLTHROUGH */
-       case ESE_DZ_L3_CLASS_IP4:
-               l3_ptype = (tun_ptype == 0) ? RTE_PTYPE_L3_IPV4_EXT_UNKNOWN :
-                       RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
-               ol_flags |= PKT_RX_RSS_HASH |
-                       ((EFX_TEST_QWORD_BIT(rx_ev, ip_csum_err_bit)) ?
-                        PKT_RX_IP_CKSUM_BAD : PKT_RX_IP_CKSUM_GOOD);
-               break;
-       case ESE_DZ_L3_CLASS_IP6_FRAG:
-               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_FRAG :
-                       RTE_PTYPE_INNER_L4_FRAG;
-               /* FALLTHROUGH */
-       case ESE_DZ_L3_CLASS_IP6:
-               l3_ptype = (tun_ptype == 0) ? RTE_PTYPE_L3_IPV6_EXT_UNKNOWN :
-                       RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
-               ol_flags |= PKT_RX_RSS_HASH;
-               break;
-       case ESE_DZ_L3_CLASS_ARP:
-               /* Override Layer 2 packet type */
-               /* There is no ARP classification for inner packets */
-               if (tun_ptype == 0)
-                       l2_ptype = RTE_PTYPE_L2_ETHER_ARP;
-               break;
-       default:
-               /* Unexpected Layer 3 class */
-               SFC_ASSERT(false);
-       }
-
-       /*
-        * RX_L4_CLASS is 3 bits wide on Huntington and Medford, but is only
-        * 2 bits wide on Medford2. Check it is safe to use the Medford2 field
-        * and values for all EF10 controllers.
-        */
-       RTE_BUILD_BUG_ON(ESF_FZ_RX_L4_CLASS_LBN != ESF_DE_RX_L4_CLASS_LBN);
-       switch (EFX_QWORD_FIELD(rx_ev, ESF_FZ_RX_L4_CLASS)) {
-       case ESE_FZ_L4_CLASS_TCP:
-                RTE_BUILD_BUG_ON(ESE_FZ_L4_CLASS_TCP != ESE_DE_L4_CLASS_TCP);
-               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_TCP :
-                       RTE_PTYPE_INNER_L4_TCP;
-               ol_flags |=
-                       (EFX_TEST_QWORD_BIT(rx_ev, l4_csum_err_bit)) ?
-                       PKT_RX_L4_CKSUM_BAD : PKT_RX_L4_CKSUM_GOOD;
-               break;
-       case ESE_FZ_L4_CLASS_UDP:
-                RTE_BUILD_BUG_ON(ESE_FZ_L4_CLASS_UDP != ESE_DE_L4_CLASS_UDP);
-               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_UDP :
-                       RTE_PTYPE_INNER_L4_UDP;
-               ol_flags |=
-                       (EFX_TEST_QWORD_BIT(rx_ev, l4_csum_err_bit)) ?
-                       PKT_RX_L4_CKSUM_BAD : PKT_RX_L4_CKSUM_GOOD;
-               break;
-       case ESE_FZ_L4_CLASS_UNKNOWN:
-                RTE_BUILD_BUG_ON(ESE_FZ_L4_CLASS_UNKNOWN !=
-                                 ESE_DE_L4_CLASS_UNKNOWN);
-               break;
-       default:
-               /* Unexpected Layer 4 class */
-               SFC_ASSERT(false);
-       }
-
-done:
-       m->ol_flags = ol_flags & ol_mask;
-       m->packet_type = tun_ptype | l2_ptype | l3_ptype | l4_ptype;
-}
-
 static uint16_t
 sfc_ef10_rx_pseudo_hdr_get_len(const uint8_t *pseudo_hdr)
 {
diff --git a/drivers/net/sfc/sfc_ef10_rx_ev.h b/drivers/net/sfc/sfc_ef10_rx_ev.h
new file mode 100644 (file)
index 0000000..774a789
--- /dev/null
@@ -0,0 +1,164 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright (c) 2018 Solarflare Communications Inc.
+ * All rights reserved.
+ *
+ * This software was jointly developed between OKTET Labs (under contract
+ * for Solarflare) and Solarflare Communications, Inc.
+ */
+
+#ifndef _SFC_EF10_RX_EV_H
+#define _SFC_EF10_RX_EV_H
+
+#include <rte_mbuf.h>
+
+#include "efx_types.h"
+#include "efx_regs.h"
+#include "efx_regs_ef10.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void
+sfc_ef10_rx_ev_to_offloads(const efx_qword_t rx_ev, struct rte_mbuf *m,
+                          uint64_t ol_mask)
+{
+       uint32_t tun_ptype = 0;
+       /* Which event bit is mapped to PKT_RX_IP_CKSUM_* */
+       int8_t ip_csum_err_bit;
+       /* Which event bit is mapped to PKT_RX_L4_CKSUM_* */
+       int8_t l4_csum_err_bit;
+       uint32_t l2_ptype = 0;
+       uint32_t l3_ptype = 0;
+       uint32_t l4_ptype = 0;
+       uint64_t ol_flags = 0;
+
+       if (unlikely(EFX_TEST_QWORD_BIT(rx_ev, ESF_DZ_RX_PARSE_INCOMPLETE_LBN)))
+               goto done;
+
+       switch (EFX_QWORD_FIELD(rx_ev, ESF_EZ_RX_ENCAP_HDR)) {
+       default:
+               /* Unexpected encapsulation tag class */
+               SFC_ASSERT(false);
+               /* FALLTHROUGH */
+       case ESE_EZ_ENCAP_HDR_NONE:
+               break;
+       case ESE_EZ_ENCAP_HDR_VXLAN:
+               /*
+                * It is definitely UDP, but we have no information
+                * about IPv4 vs IPv6 and VLAN tagging.
+                */
+               tun_ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP;
+               break;
+       case ESE_EZ_ENCAP_HDR_GRE:
+               /*
+                * We have no information about IPv4 vs IPv6 and VLAN tagging.
+                */
+               tun_ptype = RTE_PTYPE_TUNNEL_NVGRE;
+               break;
+       }
+
+       if (tun_ptype == 0) {
+               ip_csum_err_bit = ESF_DZ_RX_IPCKSUM_ERR_LBN;
+               l4_csum_err_bit = ESF_DZ_RX_TCPUDP_CKSUM_ERR_LBN;
+       } else {
+               ip_csum_err_bit = ESF_EZ_RX_IP_INNER_CHKSUM_ERR_LBN;
+               l4_csum_err_bit = ESF_EZ_RX_TCP_UDP_INNER_CHKSUM_ERR_LBN;
+               if (unlikely(EFX_TEST_QWORD_BIT(rx_ev,
+                                               ESF_DZ_RX_IPCKSUM_ERR_LBN)))
+                       ol_flags |= PKT_RX_EIP_CKSUM_BAD;
+       }
+
+       switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_ETH_TAG_CLASS)) {
+       case ESE_DZ_ETH_TAG_CLASS_NONE:
+               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER :
+                       RTE_PTYPE_INNER_L2_ETHER;
+               break;
+       case ESE_DZ_ETH_TAG_CLASS_VLAN1:
+               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER_VLAN :
+                       RTE_PTYPE_INNER_L2_ETHER_VLAN;
+               break;
+       case ESE_DZ_ETH_TAG_CLASS_VLAN2:
+               l2_ptype = (tun_ptype == 0) ? RTE_PTYPE_L2_ETHER_QINQ :
+                       RTE_PTYPE_INNER_L2_ETHER_QINQ;
+               break;
+       default:
+               /* Unexpected Eth tag class */
+               SFC_ASSERT(false);
+       }
+
+       switch (EFX_QWORD_FIELD(rx_ev, ESF_DZ_RX_L3_CLASS)) {
+       case ESE_DZ_L3_CLASS_IP4_FRAG:
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_FRAG :
+                       RTE_PTYPE_INNER_L4_FRAG;
+               /* FALLTHROUGH */
+       case ESE_DZ_L3_CLASS_IP4:
+               l3_ptype = (tun_ptype == 0) ? RTE_PTYPE_L3_IPV4_EXT_UNKNOWN :
+                       RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN;
+               ol_flags |= PKT_RX_RSS_HASH |
+                       ((EFX_TEST_QWORD_BIT(rx_ev, ip_csum_err_bit)) ?
+                        PKT_RX_IP_CKSUM_BAD : PKT_RX_IP_CKSUM_GOOD);
+               break;
+       case ESE_DZ_L3_CLASS_IP6_FRAG:
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_FRAG :
+                       RTE_PTYPE_INNER_L4_FRAG;
+               /* FALLTHROUGH */
+       case ESE_DZ_L3_CLASS_IP6:
+               l3_ptype = (tun_ptype == 0) ? RTE_PTYPE_L3_IPV6_EXT_UNKNOWN :
+                       RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN;
+               ol_flags |= PKT_RX_RSS_HASH;
+               break;
+       case ESE_DZ_L3_CLASS_ARP:
+               /* Override Layer 2 packet type */
+               /* There is no ARP classification for inner packets */
+               if (tun_ptype == 0)
+                       l2_ptype = RTE_PTYPE_L2_ETHER_ARP;
+               break;
+       default:
+               /* Unexpected Layer 3 class */
+               SFC_ASSERT(false);
+       }
+
+       /*
+        * RX_L4_CLASS is 3 bits wide on Huntington and Medford, but is only
+        * 2 bits wide on Medford2. Check it is safe to use the Medford2 field
+        * and values for all EF10 controllers.
+        */
+       RTE_BUILD_BUG_ON(ESF_FZ_RX_L4_CLASS_LBN != ESF_DE_RX_L4_CLASS_LBN);
+       switch (EFX_QWORD_FIELD(rx_ev, ESF_FZ_RX_L4_CLASS)) {
+       case ESE_FZ_L4_CLASS_TCP:
+                RTE_BUILD_BUG_ON(ESE_FZ_L4_CLASS_TCP != ESE_DE_L4_CLASS_TCP);
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_TCP :
+                       RTE_PTYPE_INNER_L4_TCP;
+               ol_flags |=
+                       (EFX_TEST_QWORD_BIT(rx_ev, l4_csum_err_bit)) ?
+                       PKT_RX_L4_CKSUM_BAD : PKT_RX_L4_CKSUM_GOOD;
+               break;
+       case ESE_FZ_L4_CLASS_UDP:
+                RTE_BUILD_BUG_ON(ESE_FZ_L4_CLASS_UDP != ESE_DE_L4_CLASS_UDP);
+               l4_ptype = (tun_ptype == 0) ? RTE_PTYPE_L4_UDP :
+                       RTE_PTYPE_INNER_L4_UDP;
+               ol_flags |=
+                       (EFX_TEST_QWORD_BIT(rx_ev, l4_csum_err_bit)) ?
+                       PKT_RX_L4_CKSUM_BAD : PKT_RX_L4_CKSUM_GOOD;
+               break;
+       case ESE_FZ_L4_CLASS_UNKNOWN:
+                RTE_BUILD_BUG_ON(ESE_FZ_L4_CLASS_UNKNOWN !=
+                                 ESE_DE_L4_CLASS_UNKNOWN);
+               break;
+       default:
+               /* Unexpected Layer 4 class */
+               SFC_ASSERT(false);
+       }
+
+done:
+       m->ol_flags = ol_flags & ol_mask;
+       m->packet_type = tun_ptype | l2_ptype | l3_ptype | l4_ptype;
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SFC_EF10_RX_EV_H */