common/mlx5: add MMO configuration for DevX queue pair
authorRaja Zidane <rzidane@nvidia.com>
Tue, 5 Oct 2021 12:27:31 +0000 (12:27 +0000)
committerThomas Monjalon <thomas@monjalon.net>
Tue, 5 Oct 2021 16:15:40 +0000 (18:15 +0200)
A new configuration MMO was added to QP Context.
If set, MMO WQEs are supported on this QP.
For DMA MMO, supported only when dma_mmo_qp==1.
For REGEXP MMO, supported only when regexp_mmo_qp==1.
For COMPRESS MMO, supported only when compress_mmo_qp==1.
For DECOMPRESS MMO, supported only when decompress_mmo_qp==1.
Add support to DevX interface to set MMO bit.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
drivers/common/mlx5/mlx5_devx_cmds.c
drivers/common/mlx5/mlx5_devx_cmds.h
drivers/common/mlx5/mlx5_prm.h

index 00c78b1..eefb869 100644 (file)
@@ -2032,6 +2032,13 @@ mlx5_devx_cmd_create_qp(void *ctx,
        MLX5_SET(qpc, qpc, ts_format, attr->ts_format);
        MLX5_SET(qpc, qpc, user_index, attr->user_index);
        if (attr->uar_index) {
+               if (attr->mmo) {
+                       void *qpc_ext_and_pas_list = MLX5_ADDR_OF(create_qp_in,
+                               in, qpc_extension_and_pas_list);
+                       void *qpc_ext = MLX5_ADDR_OF(qpc_extension_and_pas_list,
+                               qpc_ext_and_pas_list, qpc_data_extension);
+                       MLX5_SET(qpc_extension, qpc_ext, mmo, 1);
+               }
                MLX5_SET(qpc, qpc, pm_state, MLX5_QP_PM_MIGRATED);
                MLX5_SET(qpc, qpc, uar_page, attr->uar_index);
                if (attr->log_page_size > MLX5_ADAPTER_PAGE_SHIFT)
index b21df0f..e149f8b 100644 (file)
@@ -403,6 +403,7 @@ struct mlx5_devx_qp_attr {
        uint32_t wq_umem_id;
        uint64_t wq_umem_offset;
        uint32_t user_index:24;
+       uint32_t mmo:1;
 };
 
 struct mlx5_devx_virtio_q_couners_attr {
index ec5f871..54e62aa 100644 (file)
@@ -3243,6 +3243,28 @@ struct mlx5_ifc_create_qp_out_bits {
        u8 reserved_at_60[0x20];
 };
 
+struct mlx5_ifc_qpc_extension_bits {
+       u8 reserved_at_0[0x2];
+       u8 mmo[0x1];
+       u8 reserved_at_3[0x5fd];
+};
+
+#ifdef PEDANTIC
+#pragma GCC diagnostic ignored "-Wpedantic"
+#endif
+struct mlx5_ifc_qpc_pas_list_bits {
+       u8 pas[0][0x40];
+};
+
+#ifdef PEDANTIC
+#pragma GCC diagnostic ignored "-Wpedantic"
+#endif
+struct mlx5_ifc_qpc_extension_and_pas_list_bits {
+       struct mlx5_ifc_qpc_extension_bits qpc_data_extension;
+       u8 pas[0][0x40];
+};
+
+
 #ifdef PEDANTIC
 #pragma GCC diagnostic ignored "-Wpedantic"
 #endif
@@ -3260,7 +3282,11 @@ struct mlx5_ifc_create_qp_in_bits {
        u8 wq_umem_id[0x20];
        u8 wq_umem_valid[0x1];
        u8 reserved_at_861[0x1f];
-       u8 pas[0][0x40];
+       union {
+               struct mlx5_ifc_qpc_pas_list_bits qpc_pas_list;
+               struct mlx5_ifc_qpc_extension_and_pas_list_bits
+                                       qpc_extension_and_pas_list;
+       };
 };
 #ifdef PEDANTIC
 #pragma GCC diagnostic error "-Wpedantic"