dpdk.git
3 years agonet/hns3: fix configure FEC when concurrent with reset
Chengchang Tang [Sat, 10 Apr 2021 01:11:20 +0000 (09:11 +0800)]
net/hns3: fix configure FEC when concurrent with reset

Currently, after the reset is complete, the PMD restores the FEC
according to the FEC configuration reserved in the driver. If there is a
concurrency between the FEC setup operation and the restore operation
after a reset, the FEC status of the last hardware may be unknown.

This patch adds the step of obtaining the lock when setting the FEC to
avoid concurrency between restore operation and setting operation.

Fixes: 9bf2ea8dbc65 ("net/hns3: support FEC")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix queue state when concurrent with reset
Chengchang Tang [Sat, 10 Apr 2021 01:11:19 +0000 (09:11 +0800)]
net/hns3: fix queue state when concurrent with reset

At the end of the reset, the state of queues need to be restored
according to the states saved in the driver. If the start and stop
operations of the queues are concurrent at this time, it may cause the
final status to be uncertain.

This patch requires queues to acquire the hw lock before starting and
stopping. If the device is being restored due to reset at this time, it
will block until the reset is completed.

Fixes: fa29fe45a7b4 ("net/hns3: support queue start and stop")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix timing in resetting queues
Chengchang Tang [Sat, 10 Apr 2021 01:11:18 +0000 (09:11 +0800)]
net/hns3: fix timing in resetting queues

During the task queue pairs reset, the getimeofday is used to obtain the
timestamp to determine whether the command execution times out. But
gettimeofday is not monotonous, it can be modified by system
administrators, so the timing may not be accurate or even cause the loop
to wait consistently.
And actually, in this scenario, it is not necessary to obtain the
timestamp.

This patch removes the operation of obtaining the timestamp from the task
queue pairs reset function.

Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix some packet types
Chengwen Feng [Sat, 10 Apr 2021 01:11:17 +0000 (09:11 +0800)]
net/hns3: fix some packet types

Currently, the packet type calculated by
vlan/ovlan/l3id/l4id/ol3id/ol4id fields have the following problems:
1) Identify error when exist VLAN strip which will lead to the data
   buffer has non VLAN header but mbuf's ptype have L2_ETHER_VLAN flag.
2) Some packet identifies error, eg: hardware report it's RARP or
   unknown packet, but ptype will marked with L2_ETHER .

So driver will calculate packet type only by l3id/l4id/ol3id/ol4id
fields.

Fixes: 0e98d5e6d9c3 ("net/hns3: fix packet type report in Rx")
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix concurrent interrupt handling
Hongbo Zheng [Sat, 10 Apr 2021 01:11:16 +0000 (09:11 +0800)]
net/hns3: fix concurrent interrupt handling

Currently, if RAS interrupt and FLR occurred at the same time, FLR will
be detected and corresponding schedule state will be set during RAS
interrupt processing. However, the schedule state value will be
overridden in subsequent RAS processing, resulting in FLR processing
failure. This patch solves this problem.

Fixes: 2790c6464725 ("net/hns3: support device reset")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix rollback in PF init
Min Hu (Connor) [Sat, 10 Apr 2021 01:11:15 +0000 (09:11 +0800)]
net/hns3: fix rollback in PF init

This patch adds rollback processing when updating imissed
stats failed in PF init.

Fixes: 3e9f3042d7c8 ("net/hns3: add imissed packet stats")

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: simplify selecting Rx/Tx function
Chengwen Feng [Sat, 10 Apr 2021 01:11:14 +0000 (09:11 +0800)]
net/hns3: simplify selecting Rx/Tx function

Currently, there are four control variables (rx_simple_allowed,
rx_vec_allowed, tx_simple_allowed and tx_vec_allowed) which are used
to impact the selection of Rx/Tx burst function.

The purpose of the design is to provide a way to control the selection
of Rx/Tx burst function by modifying it's values, but these variables
have no entry to modify unless make intrusive modifications.

Now we already support runtime config to select Rx/Tx function, these
variables could be removed.

Fixes: a124f9e9591b ("net/hns3: add runtime config to select IO burst function")

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: log selected datapath
Chengwen Feng [Fri, 9 Apr 2021 10:26:43 +0000 (18:26 +0800)]
net/hns3: log selected datapath

This patch adds debug info for Rx/Tx burst function which was choosing.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: refactor PF LSC event report
Chengwen Feng [Fri, 9 Apr 2021 04:45:22 +0000 (12:45 +0800)]
net/hns3: refactor PF LSC event report

Currently, PF driver will report lsc when it detects the link status
change, it's not a generic implementation.

We refactor PF lsc event report by following scheme:
1. PF driver marks RTE_PCI_DRV_INTR_LSC in rte_pci_driver by default.
2. In the init stage, PF driver will detect whether firmware supports
   lsc interrupt or not, driver will clear RTE_ETH_DEV_INTR_LSC flag if
   firmware doesn't support lsc interrupt.
3. PF driver will report lsc event only when dev_conf.intr_conf.lsc is
   set.

Note: If the firmware supports lsc interrupt, we also keep periodic
polling to deal with the interrupt loss.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: refactor VF LSC event report
Chengwen Feng [Fri, 9 Apr 2021 04:45:21 +0000 (12:45 +0800)]
net/hns3: refactor VF LSC event report

Currently, VF driver periodically obtains link status from PF kernel
driver, and reports lsc event when detects link status change. Because
the period is 1 second, it's probably too late to report especially
in such as bonding scenario.

To solve this problem we use the following scheme:
1. PF kernel driver support immediate push link status to all VFs when
   it detects the link status changes.
2. VF driver will detect PF kernel driver whether support push link
   status in device init stage by sending request link info mailbox
   message to PF, PF then tell VF the push capability by extend
   HNS3_MBX_LINK_STAT_CHANGE mailbox message.
3. VF driver marks RTE_PCI_DRV_INTR_LSC in rte_pci_driver by default,
   when it detects PF doesn't support push link status then it will clear
   RTE_ETH_DEV_INTR_LSC flag.

So if PF kernel driver supports push link status to VF, then VF driver
will have RTE_ETH_DEV_INTR_LSC capability.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agotest: fix TCP header initialization
Lance Richardson [Tue, 30 Mar 2021 13:23:28 +0000 (09:23 -0400)]
test: fix TCP header initialization

Initialize TCP data offset field with TCP header length, this
field is used to derive L4 header length and by hardware to
validate a TCP header.

Fixes: 41f72ec94074 ("test: add packet burst generator functions")
Cc: stable@dpdk.org
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
3 years agoapp/testpmd: fix missing MPLS tokens for RSS
Hemant Agrawal [Thu, 8 Apr 2021 09:17:44 +0000 (14:47 +0530)]
app/testpmd: fix missing MPLS tokens for RSS

This patch adds missing MPLS tokens in for RSS config.

Fixes: d810252857c9 ("ethdev: add MPLS RSS offload type")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
3 years agoethdev: fix VXLAN mask initialization
Gregory Etelson [Thu, 8 Apr 2021 06:48:22 +0000 (09:48 +0300)]
ethdev: fix VXLAN mask initialization

In GCC compiler, __builtin_constant_p(exp) is a function.
The function returns the integer 1 if the argument is known to be
a compile-time constant.
Therefore, __builtin_constant_p(0xffffff << 8) returned 1.
As the result, rte_flow_item_vxlan_mask was initiated to
{{
  {flags = 0x0, rsvd0 = {0x0, 0x0, 0x0},
   vni = {0x0, 0x0, 0x0}, rsvd1 = 0x1},
  hdr = {vx_flags = 0x0, vx_vni = 0x1000000}}}
}}
GCC fails initialization
rte_flow_item_vxlan_mask.hdr.vni = (0xffffff << 8)
with "initializer element is not a constant expression" error.
Use immediate 0xffffff00 value instead.

Fixes: 43af98e687cf ("ethdev: reuse VXLAN header definition in flow item")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
3 years agobuildtools: fix all drivers disabled on Windows
Dmitry Kozlyuk [Fri, 16 Apr 2021 20:48:52 +0000 (23:48 +0300)]
buildtools: fix all drivers disabled on Windows

buildtools/list-dir-globs.py printed paths with OS directory separator,
which is "/" on Unices and "\" on Windows, while Meson code always
expected "/". This resulted in all drivers being disabled on Windows.

Replace "\" with "/" in script output. Forward slash is a valid,
although non-default, separator on Windows, so no paths can be broken
by this substitution.

Fixes: ab9407c3addd ("build: allow using wildcards to disable drivers")
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
3 years agodoc: add links for build requirements per OS
Asaf Penso [Wed, 24 Feb 2021 08:53:24 +0000 (08:53 +0000)]
doc: add links for build requirements per OS

To compile with meson some dependencies should be installed.
Section "Getting the Tools" describes what needed, but per
OS there are additional steps to do.

Add links to Linux, FreeBSD, and Windows guide for more info.

Signed-off-by: Asaf Penso <asafp@nvidia.com>
3 years agodoc: update minimum required Meson version for Windows
Jie Zhou [Wed, 24 Feb 2021 23:36:52 +0000 (15:36 -0800)]
doc: update minimum required Meson version for Windows

Meson with Windows clang generates incorrect linker flag
"--subsystem,console" instead of "/subsystem:console" which
will fail the DPDK build. This is discovered at porting testpmd.

Meson 0.57.0 has the fix and should be used for DPDK Windows build.
Update the WindowsGSG DPDK Build document for the proper meson version.

Signed-off-by: Jie Zhou <jizh@microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
3 years agobuild: update minimum required Meson version
Gabriel Ganne [Tue, 23 Mar 2021 09:52:19 +0000 (10:52 +0100)]
build: update minimum required Meson version

Bump Meson required version to 0.49.2 which is chosen so as
to be provided by both redhat-8 and debian-10.

Update documentation and travis setup script accordingly.

This fixes the following warning:
WARNING: Project targeting '>= 0.47.1' but tried to use feature introduced
         in '0.48.0': console arg in custom_target

'console' argument is used within kernel/linux/kni/meson.build

Signed-off-by: Gabriel Ganne <gabriel.ganne@6wind.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
3 years agoexamples/l2fwd-crypto: remove key size validation
Shiri Kuzin [Tue, 13 Apr 2021 16:24:52 +0000 (19:24 +0300)]
examples/l2fwd-crypto: remove key size validation

In the example application the key can be provided by the user or
generated randomly by the example application.

Then a validation is done in order to check if the key size is
supported in the algorithm capabilities.

A new feature flag is added in crypto PMDs to allow wrapped keys,
hence, to allow wrapped keys, app should remove the validation of
key size in the application and rely on a PMD key size validation.

The validation is removed in case the key is provided by user and
the RTE_CRYPTODEV_FF_CIPHER_WRAPPED_KEY feature flag is set, and
kept in case the key should be generated by the application or
RTE_CRYPTODEV_FF_CIPHER_WRAPPED_KEY is not set.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocryptodev: formalize key wrap method in API
Matan Azrad [Tue, 13 Apr 2021 06:37:18 +0000 (09:37 +0300)]
cryptodev: formalize key wrap method in API

The Key Wrap approach is used by applications in order to protect keys
located in untrusted storage or transmitted over untrusted
communications networks. The constructions are typically built from
standard primitives such as block ciphers and cryptographic hash
functions.

The Key Wrap method and its parameters are a secret between the keys
provider and the device, means that the device is preconfigured for
this method using very secured way.

The key wrap method may change the key length and layout.

Add a description for the cipher transformation key to allow wrapped key
to be forwarded by the same API.

Add a new feature flag RTE_CRYPTODEV_FF_CIPHER_WRAPPED_KEY to be enabled
by PMDs support wrapped key in cipher trasformation.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocryptodev: add dequeue count parameter in raw API
Fan Zhang [Wed, 31 Mar 2021 17:20:38 +0000 (18:20 +0100)]
cryptodev: add dequeue count parameter in raw API

This patch changes the experimental raw data path dequeue burst API.
Originally the API enforces the user to provide callback function
to get maximum dequeue count. This change gives the user one more
option to pass directly the expected dequeue count.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocrypto/octeontx2: support lookaside IPv4 transport mode
Tejasree Kondoj [Thu, 15 Apr 2021 07:22:05 +0000 (12:52 +0530)]
crypto/octeontx2: support lookaside IPv4 transport mode

Adding support for IPv4 lookaside IPsec transport mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agoexamples/ipsec-secgw: support UDP encapsulation
Tejasree Kondoj [Thu, 15 Apr 2021 07:22:04 +0000 (12:52 +0530)]
examples/ipsec-secgw: support UDP encapsulation

Adding lookaside IPsec UDP encapsulation support
for NAT traversal.
Application has to add udp-encap option to sa config file
to enable UDP encapsulation on the SA.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
3 years agocrypto/octeontx2: support UDP encapsulation
Tejasree Kondoj [Thu, 15 Apr 2021 07:22:03 +0000 (12:52 +0530)]
crypto/octeontx2: support UDP encapsulation

Adding UDP encapsulation support for IPsec in
lookaside protocol mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocryptodev: support multiple cipher data-units
Matan Azrad [Wed, 14 Apr 2021 20:21:58 +0000 (22:21 +0200)]
cryptodev: support multiple cipher data-units

In cryptography, a block cipher is a deterministic algorithm operating
on fixed-length groups of bits, called blocks.

A block cipher consists of two paired algorithms, one for encryption
and the other for decryption. Both algorithms accept two inputs:
an input block of size n bits and a key of size k bits; and both yield
an n-bit output block. The decryption algorithm is defined to be the
inverse function of the encryption.

For AES standard the block size is 16 bytes.
For AES in XTS mode, the data to be encrypted\decrypted does not have to
be multiple of 16B size, the unit of data is called data-unit.
The data-unit size can be any size in range [16B, 2^24B], so, in this
case, a data stream is divided into N amount of equal data-units and
must be encrypted\decrypted in the same data-unit resolution.

For ABI compatibility reason, the size is limited to 64K (16-bit field).
The new field dataunit_len is inserted in a struct padding hole,
which is only 2 bytes long in 32-bit build.
It could be moved and extended later during an ABI-breakage window.

The current cryptodev API doesn't allow the user to select a specific
data-unit length supported by the devices.
In addition, there is no definition how the IV is detected per data-unit
when single operation includes more than one data-unit.

That causes applications to use single operation per data-unit even though
all the data is continuous in memory what reduces datapath performance.

Add a new feature flag to support multiple data-unit sizes, called
RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
Add a new field in cipher capability, called dataunit_set,
where the devices can report the range of the supported data-unit sizes.
Add a new cipher transformation field, called dataunit_len, where the user
can select the data-unit length for all the operations.

All the new fields do not change the size of their structures,
by filling some struct padding holes.
They are added as exceptions in the ABI check file libabigail.abignore.

Using a bitmap to report the supported data-unit sizes capability allows
the devices to report a range simply as same as the user to read it
simply. also, thus sizes are usually common and probably will be shared
among different devices.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocrypto/qat: fix offset for out-of-place scatter-gather
Arek Kusztal [Thu, 18 Mar 2021 13:16:17 +0000 (13:16 +0000)]
crypto/qat: fix offset for out-of-place scatter-gather

This commit fixes problem with to small offset when both offsets
(auth, cipher) are non zero in digest encrypt case,
when using out-of-place and sgl.

Fixes: 40002f6c2a24 ("crypto/qat: extend support for digest-encrypted auth-cipher")
Cc: stable@dpdk.org
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
3 years agocrypto/qat: support single-pass GMAC on GEN3
Adam Dybkowski [Wed, 14 Apr 2021 11:33:21 +0000 (12:33 +0100)]
crypto/qat: support single-pass GMAC on GEN3

This patch implements Single-Pass AES-GMAC possible on QAT GEN3
which improves the performance. On GEN1 and GEN2 the previous
chained method is used.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
3 years agoapp/crypto-perf: close device after benchmark run
Adam Dybkowski [Fri, 9 Apr 2021 12:13:01 +0000 (13:13 +0100)]
app/crypto-perf: close device after benchmark run

This patch adds closing of the PMD after running the benchmark.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agotest/crypto: close device after tests
Adam Dybkowski [Fri, 9 Apr 2021 12:13:00 +0000 (13:13 +0100)]
test/crypto: close device after tests

This patch adds closing of the PMD after running the tests.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agoexamples/l2fwd-crypto: fix packet length while decryption
Rohit Raj [Fri, 9 Apr 2021 13:14:59 +0000 (18:44 +0530)]
examples/l2fwd-crypto: fix packet length while decryption

There were some padding left when a packet gets decrypted. This
patch removes those padding.
This patch also removes the padding left after verifying auth of
the packet.

Fixes: e2cdfbd07c8a ("examples/l2fwd-crypto: fix port id type")
Cc: stable@dpdk.org
Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agoexamples/l2fwd-crypto: skip masked devices
Apeksha Gupta [Fri, 9 Apr 2021 13:09:14 +0000 (18:39 +0530)]
examples/l2fwd-crypto: skip masked devices

The devices which are masked by cryptodev mask should not be initialized
and skipped while traversing the device list.

Fixes: 6ae3fb9df66e ("examples/l2fwd-crypto: fix session mempool size")
Cc: stable@dpdk.org
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agoexamples/l2fwd-crypto: align private data size to cache size
Gagandeep Singh [Fri, 9 Apr 2021 12:56:21 +0000 (18:26 +0530)]
examples/l2fwd-crypto: align private data size to cache size

L2fwd-crypto is passing 24b private data size while packet
pool creation. This patch aligns that private data size
to cache line size for better performance results.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agodoc: update limitations of OCTEON TX crypto PMDs
Anoob Joseph [Fri, 26 Mar 2021 09:18:07 +0000 (14:48 +0530)]
doc: update limitations of OCTEON TX crypto PMDs

Update known limitations of OCTEON TX crypto PMDs.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
3 years agotest/crypto: add cases for block cipher encrypted digest
Tejasree Kondoj [Wed, 24 Mar 2021 16:45:08 +0000 (22:15 +0530)]
test/crypto: add cases for block cipher encrypted digest

Add test cases for block cipher DIGEST_ENCRYPTED mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocommon/cpt: support encrypted digest mode
Tejasree Kondoj [Wed, 24 Mar 2021 16:45:07 +0000 (22:15 +0530)]
common/cpt: support encrypted digest mode

Added support for DIGEST_ENCRYPTED mode for octeontx
and octeontx2 platforms.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocrypto/octeontx2: remove useless union member
Tejasree Kondoj [Mon, 15 Mar 2021 10:34:06 +0000 (16:04 +0530)]
crypto/octeontx2: remove useless union member

Removing redundant field in a union.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
3 years agodoc: fix dpdk-graph-crypto-perf dependencies
Ciara Power [Mon, 1 Mar 2021 11:28:31 +0000 (11:28 +0000)]
doc: fix dpdk-graph-crypto-perf dependencies

The script dependencies list was incomplete,
this patch adds missing modules and removes an unnecessary entry.
The installation command was also added.

Fixes: f400e0b82bf1 ("app/crypto-perf: add script to graph perf results")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agocrypto/octeontx: fix session-less mode
Ankur Dwivedi [Mon, 1 Mar 2021 05:59:55 +0000 (11:29 +0530)]
crypto/octeontx: fix session-less mode

A temporary session is created for sessionless crypto operations.
rte_cryptodev_sym_session_create() should be used for creating the
temporary session as it initializes the session structure in the
correct way.

Fixes: caeba5062c39 ("crypto/octeontx: improve symmetric session-less path")
Cc: stable@dpdk.org
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
3 years agobbdev: add explicit enum for code block mode
Nicolas Chautru [Sat, 20 Feb 2021 00:15:05 +0000 (16:15 -0800)]
bbdev: add explicit enum for code block mode

Using explicit enum instead of ambiguous integer value

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
3 years agoci: bump ABI reference version
David Marchand [Thu, 15 Apr 2021 19:43:02 +0000 (21:43 +0200)]
ci: bump ABI reference version

When bumping DPDK version, we should have bumped the ABI reference too.

Fixes: 442155f70c6b ("version: 21.05-rc0")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
3 years agoci: fix ABI reference generation
David Marchand [Thu, 15 Apr 2021 19:43:01 +0000 (21:43 +0200)]
ci: fix ABI reference generation

The machine=generic is not understood by older version of dpdk.
It is directly passed to gcc as -march=generic.

Since DPDK requires SSE 4.2, this results in an error when configuring
v21.02 sources for generating the reference ABI.

From GHA [1] logs:

"""
Compiler for C supports arguments -Wundef: YES
Compiler for C supports arguments -Wwrite-strings: YES
Compiler for C supports arguments -Wno-address-of-packed-member
-Waddress-of-packed-member: NO
Compiler for C supports arguments -Wno-packed-not-aligned
-Wpacked-not-aligned: NO
Compiler for C supports arguments -Wno-missing-field-initializers
-Wmissing-field-initializers: YES

config/x86/meson.build:14:6: ERROR:  Could not get define '__SSE4_2__'

A full log can be found at
/home/runner/work/dpdk/dpdk-v21.02/build/meson-logs/meson-log.txt
Error: Process completed with exit code 1.
"""

1: https://github.com/ovsrobot/dpdk/runs/2355005702

Stick to a compatible configuration passing -Dmachine=default.

Note: the breakage was not seen earlier this week as I guess the CI
workers are using a cached ABI reference for v20.11.

Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
3 years agopower: fix closing frequency file
Anatoly Burakov [Wed, 14 Apr 2021 10:07:00 +0000 (10:07 +0000)]
power: fix closing frequency file

Currently, we open the system base frequency file, but never close it,
which results in a memory leak.

Coverity issue: 369693
Fixes: 8a5febaac4f7 ("power: fix P-state base frequency handling")

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Reshma Pattan <reshma.pattan@intel.com>
3 years agopower: remove redundant close of frequency file
Anatoly Burakov [Wed, 7 Apr 2021 15:56:42 +0000 (15:56 +0000)]
power: remove redundant close of frequency file

Previous fix has addressed the incorrect handling of `base_frequency`
file, but has added a use-after-free error due to the fact that all
further code paths will lead to an `fclose()` call at the end, so the
additional `fclose()` call right after processing the file was
unnecessary.

Coverity issue: 369901
Fixes: 8a5febaac4f7 ("power: fix P-state base frequency handling")

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: Liang Ma <liangma@liangbit.com>
Acked-by: David Hunt <david.hunt@intel.com>
3 years agoconfig/arm: fix implementer and its SoCs
Juraj Linkeš [Wed, 14 Apr 2021 13:41:36 +0000 (15:41 +0200)]
config/arm: fix implementer and its SoCs

Fix the implementer and part number of DPAA and ARMADA SoCs.
The current values of 16 cores and 1 NUMA node don't cover all SoCs from
the Arm implementer, e.g. Taishan 2280 has 64 cores and 4 NUMA nodes.
Increase these to 64 and 4 to widen the coverage.
Also increase the neoverse-n1 MAX_LCORE and MAX_NUMA_NODES to reflect
new available hardware (Amplere Altra).
Add configuration to SoC options where smaller values are needed.

Fixes: 6ec78c2463ac ("build: add meson support for dpaaX platforms")
Fixes: dd1cd845c102 ("config: add Marvell ARMADA based on armv8-a")
Fixes: d97108a33231 ("config: change defaults of armv8")

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
3 years agoconfig/arm: add platform config option
Juraj Linkeš [Wed, 14 Apr 2021 13:41:35 +0000 (15:41 +0200)]
config/arm: add platform config option

Add Arm SoC configuration sets to Arm meson.build and add an arch
agnostic meson option, 'platform', to select from these SoC
configurations for meson native builds. This is preferable to
specifying a cross file when doing aarch64 -> aarch64 builds, since the
cross file specifies the toolchain as well.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Tested-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agoconfig: enable/disable drivers in Arm builds
Juraj Linkeš [Wed, 14 Apr 2021 13:41:34 +0000 (15:41 +0200)]
config: enable/disable drivers in Arm builds

Add support for enabling or disabling drivers for Arm cross build. Do
not implement any enable/disable lists yet.

Enabling drivers is useful when building for an SoC where we only want
to build a few drivers. That way the list won't be too long.

Similarly, disabling drivers is useful when we want to disable only a
few drivers.

Both of these are advantageous mainly in aarch64 -> aarch64 (or arch ->
same arch) builds, where the build machine may have the required driver
dependencies, yet we don't want to build drivers for a specific SoC.

If enable_drivers is a non-empty list, build only those drivers,
otherwise build all drivers and add them to enable_drivers.  If
disable_drivers is non-empty list, build all drivers specified in
enable_drivers except those in disable_drivers.

There are two drivers, bus/pci and bus/vdev, which break the build if
not enabled. Address this by always enabling these if the user disables
them or doesn't specify in their allowlist.

Also remove the old Makefile arm configuration options which don't do
anything in Meson.

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
3 years agoeal: add C++ include guard for reciprocal header
Tyler Retzlaff [Wed, 17 Mar 2021 16:14:12 +0000 (09:14 -0700)]
eal: add C++ include guard for reciprocal header

Add missing extern "C" linkage for rte_reciprocal.h consistent with
other eal headers.

Fixes: ffe3ec811ef5 ("sched: introduce reciprocal divide")
Cc: stable@dpdk.org
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: David Marchand <david.marchand@redhat.com>
3 years agoraw/octeontx2_dma: assign PCI device in DPI VF
Radha Mohan Chintakuntla [Fri, 9 Apr 2021 08:06:27 +0000 (01:06 -0700)]
raw/octeontx2_dma: assign PCI device in DPI VF

The PCI device address is being used for sending mailbox which was
introduced in previous commit which replaced the macros so that
multiple DPI blocks in the hardware can be supported.

This patch fixes a NULL pointer access by assigning the PCI device
structure to dpivf.

Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks")
Cc: stable@dpdk.org
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
3 years agonet: provide IP-related API on any OS
Dmitry Kozlyuk [Sat, 10 Apr 2021 22:47:32 +0000 (01:47 +0300)]
net: provide IP-related API on any OS

Users of <rte_ip.h> relied on it to provide IP-related defines,
like IPPROTO_* constants, but still had to include POSIX headers
for inet_pton() and other standard IP-related facilities.

Extend <rte_ip.h> so that it is a single header to gain access
to IP-related facilities on any OS. Use it to replace POSIX includes
in components enabled on Windows. Move missing constants from Windows
networking shim to OS shim header and include it where needed.

Remove Windows networking shim that is no longer needed.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
3 years agonet: work around s_addr macro on Windows
Dmitry Kozlyuk [Sat, 10 Apr 2021 22:47:31 +0000 (01:47 +0300)]
net: work around s_addr macro on Windows

Windows Sockets headers contain `#define s_addr S_un.S_addr`, which
conflicts with definition of `s_addr` field of `struct rte_ether_hdr`.
Prieviously `s_addr` was undefined in <rte_ether.h>, which had been
breaking access to `s_addr` field of `struct in_addr`, so some DPDK
and Windows headers could not be included in one file.

Renaming of `struct rte_ether_hdr` is planned:
https://mails.dpdk.org/archives/dev/2021-March/201444.html

Temporarily disable `s_addr` macro around `struct rte_ether_hdr`
definition to avoid conflict. Place source MAC address in both `s_addr`
and `S_un.S_addr` fields, so that access works either directly or
through the macro as defined in Windows headers.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
3 years agoeal: make OS shims internal
Dmitry Kozlyuk [Sat, 10 Apr 2021 22:47:30 +0000 (01:47 +0300)]
eal: make OS shims internal

DPDK code often relies on functions and macros that are not standard C,
but are found on all platforms, even if by slightly different names.
Windows <rte_os.h> provided macros or inline definitions for such symbols.
However, when placed in public header, these symbols were unnecessarily
exposed, breaking consumer POSIX compatibility code.

Move most of the shims to <rte_os_shim.h>, a header to be used instead
of <rte_os.h> by internal code. Include it in libraries and PMDs that
previously imported shims from <rte_os.h>. Directly replace shims that
were only used inside EAL:
* index -> strchr, rindex -> strrchr
* sleep -> rte_delay_us_sleep
* strerror_r -> strerror_s

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
3 years agoeal/windows: hide asprintf shim
Dmitry Kozlyuk [Sat, 10 Apr 2021 22:47:29 +0000 (01:47 +0300)]
eal/windows: hide asprintf shim

Make asprintf(3) implementation for Windows private to EAL, so that it's
hidden from external consumers. It is not exposed to internal consumers
either, because they don't need asprintf() and also because callers from
other modules would have no reliable way to free allocated memory.

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Khoa To <khot@microsoft.com>
Acked-by: Nick Connolly <nick.connolly@mayadata.io>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
3 years agokvargs: add get by key
Xueming Li [Tue, 13 Apr 2021 03:14:10 +0000 (03:14 +0000)]
kvargs: add get by key

Adds a new function to get value of a specific key from kvargs list.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Gaetan Rivet <grive@u256.net>
3 years agodevargs: fix memory leak on parsing failure
Xueming Li [Tue, 13 Apr 2021 03:14:09 +0000 (03:14 +0000)]
devargs: fix memory leak on parsing failure

This patch fixes memory leak in parsing error handling.

Fixes: 338327d731e6 ("devargs: add function to parse device layers")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Gaetan Rivet <grive@u256.net>
3 years agodevargs: unify scratch buffer storage
Xueming Li [Tue, 13 Apr 2021 03:14:08 +0000 (03:14 +0000)]
devargs: unify scratch buffer storage

In current design, legacy parser rte_devargs_parse() saved scratch
buffer to devargs.args while new parser rte_devargs_layers_parse() saved
to devargs.data. Code using devargs had to know the difference and
cleaned up memory accordingly - error prone.

This patch unifies scratch buffer to data field, introduces
rte_devargs_reset() function to wrap the memory clean up logic.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Reviewed-by: Gaetan Rivet <grive@u256.net>
3 years agopflock: add phase-fair reader writer locks
Stephen Hemminger [Fri, 2 Apr 2021 01:42:47 +0000 (18:42 -0700)]
pflock: add phase-fair reader writer locks

This is a new type of reader-writer lock that provides better fairness
guarantees which better suited for typical DPDK applications.
A pflock has two ticket pools, one for readers and one
for writers.

Phase-fair reader writer locks ensure that neither reader nor writer will
be starved.
Neither reader or writer are preferred, they execute in alternating
phases.
All operations of the same type (reader or writer) that acquire the lock
are handled in FIFO order.
Write operations are exclusive, and multiple read operations can be run
together (until a write arrives).

A similar implementation is in Concurrency Kit package in FreeBSD.
For more information see:
   "Reader-Writer Synchronization for Shared-Memory Multiprocessor
    Real-Time Systems",
    http://www.cs.unc.edu/~anderson/papers/ecrts09b.pdf

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
3 years agotest/trace: fix race on collected perf data
Feifei Wang [Wed, 10 Mar 2021 02:15:27 +0000 (10:15 +0800)]
test/trace: fix race on collected perf data

The measure_perf function should be executed after worker threads exit
to collect correct perf data. Otherwise, while workers are running, the
main thread may get incomplete data from workers.

In the meanwhile, remove unnecessary barrier in the test.
For signal variables "ldata.done" and "ldata.start", no operations
should keep the order that being executed after them. So the wmb after
them can be moved.

Fixes: 16a277a24c9f ("test/trace: add performance test cases")
Cc: stable@dpdk.org
Suggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agotest: take test names from command line
Bruce Richardson [Wed, 27 Jan 2021 17:42:55 +0000 (17:42 +0000)]
test: take test names from command line

While having the ability to run a test based off the DPDK_TEST
environment variable is useful, it's sometimes more convenient to
specify the test name as a commandline parameter to a test binary.
This patch adds support for checking all parameters after the EAL ones, and
running all valid autotests requested - either from DPDK_TEST or on the
commandline. This also allows multiple tests to be run in a single
automated session, which is useful for working with components which have
multiple test suites.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Aaron Conole <aconole@redhat.com>
3 years agoeventdev: fix build on RHEL 7
Pavan Nikhilesh [Tue, 13 Apr 2021 22:16:12 +0000 (03:46 +0530)]
eventdev: fix build on RHEL 7

Since queue identifier is passed as signed integer, a compilation error
is generated:
rte_event_eth_rx_adapter.c:1810:57: error: signed and unsigned type
in conditional expression [-Werror=sign-compare]
Make queue identifier as unsigned when adding it to vector data.

Bugzilla ID: 672
Fixes: d7c428e557ba ("eventdev: support Rx adapter event vector")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agoeal: do not redefine asm keyword in C++
Tyler Retzlaff [Wed, 24 Mar 2021 04:26:51 +0000 (21:26 -0700)]
eal: do not redefine asm keyword in C++

C++ forbids redefining a keyword as a macro.
The keyword asm is conditionally-supported and implementation defined,
but it seems our best guess.

In C, if asm does not exist, it is defined as __asm__
which is a GNU extension.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
3 years agolicense: fix typos
Ferruh Yigit [Fri, 9 Apr 2021 15:53:56 +0000 (16:53 +0100)]
license: fix typos

Fixes: a4862c9e1a98 ("license: introduce SPDX identifiers")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
3 years agodevtools: skip removed DLB driver in ABI check
Thomas Monjalon [Tue, 13 Apr 2021 08:29:37 +0000 (10:29 +0200)]
devtools: skip removed DLB driver in ABI check

The eventdev driver DLB was removed in DPDK 21.05,
breaking the ABI check.
The exception was agreed so we just need to skip this check.

Note: complete removal of a driver cannot be ignored
in devtools/libabigail.abignore, so the script must be patched.

Fixes: 698fa829415d ("event/dlb: remove driver")

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
3 years agoevent/octeontx2: fix device reconfigure for single slot
Harman Kalra [Mon, 5 Apr 2021 16:24:15 +0000 (21:54 +0530)]
event/octeontx2: fix device reconfigure for single slot

When device is re-configured, memory allocated for work slot is freed
and new memory is allocated. Due to this we may loose some important
configurations/mappings done with initial work slot memory.

For example, whenever rte_event_eth_tx_adapter_queue_add is called
some important meta i.e. txq handle is stored in work slot structure.
If device gets reconfigured after this tx adaptor add, txq to work
slot mapping will be lost resulting in seg fault during packet
processing, as txq handle could not be retrieved from work slot.

Fixes: 67b5f4686459 ("event/octeontx2: add port config functions")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
3 years agodoc: announce event Rx adapter config changes
Pavan Nikhilesh [Wed, 31 Mar 2021 09:30:01 +0000 (15:00 +0530)]
doc: announce event Rx adapter config changes

The Rx adapter event vector configuration will be merged into
Rx adapter queue configuration to simplify enabling event
vectorization.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
3 years agoapp/eventdev: add vector mode in pipeline test
Pavan Nikhilesh [Wed, 31 Mar 2021 09:30:00 +0000 (15:00 +0530)]
app/eventdev: add vector mode in pipeline test

Add event vector support in pipeline tests. By default this mode
is disabled, it can be enabled by using the option --enable_vector.
example:
dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
--wlcores=20-23  --enable_vector

Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector_size and
--vector_tmo_ns

This patch also adds a new option to set the number of Rx queues
configured per event eth rx adapter.
example:
dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
--wlcores=20-23  --nb_eth_queues 4

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agoeventdev: support Tx adapter event vector
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:59 +0000 (14:59 +0530)]
eventdev: support Tx adapter event vector

Add event vector support for event eth Tx adapter, the implementation
receives events from the single linked queue and based on
rte_event_vector::attr_valid transmits the vector of mbufs to a given
port, queue pair.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
3 years agoeventdev: support Rx adapter event vector
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:58 +0000 (14:59 +0530)]
eventdev: support Rx adapter event vector

Add event vector support for event eth Rx adapter, the implementation
creates vector flows based on port and queue identifier of the received
mbufs.
The flow id for SW Rx event vectorization will use 12-bits of queue
identifier and 8-bits port identifier when custom flow id is not set
for simplicity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
3 years agoeventdev: introduce event vector Tx capability
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:57 +0000 (14:59 +0530)]
eventdev: introduce event vector Tx capability

Introduce event vector transmit capability for event eth
tx adapter.

The capability indicates that the Tx adapter is capable of
transmitting event vectors.
When rte_event_vector::union_valid is set, the Tx adapter should
transmit all the packets to the rte_event_vector::port using the
rte_event_vector::queue.
If rte_event_vector::union_valid is not set then the Tx adapter
should peek into each mbuf to get the destination port and queue
pair.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
3 years agoeventdev: introduce event vector Rx capability
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:56 +0000 (14:59 +0530)]
eventdev: introduce event vector Rx capability

Introduce event ethernet Rx adapter event vector capability.

If an event eth Rx adapter has the capability of
RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR then a given Rx queue
can be configured to enable event vectorization by passing the
flag RTE_EVENT_ETH_RX_ADAPTER_QUEUE_EVENT_VECTOR to
rte_event_eth_rx_adapter_queue_conf::rx_queue_flags while configuring
Rx adapter through rte_event_eth_rx_adapter_queue_add().

The max vector size, vector timeout define the vector size and
mempool used for allocating vector event are configured through
rte_event_eth_rx_adapter_queue_add. The element size of the element
in the vector pool should be equal to
    sizeof(struct rte_event_vector) + (vector_sz * sizeof(uintptr_t))

Application can use `rte_event_vector_pool_create` to create the
vector mempool used for
rte_event_eth_rx_adapter_queue_conf::vector_mp.

The Rx adapter would be responsible for vectorizing the mbufs
based on the flow, the vector limits configured by the application
and add the vector event of mbufs to the event queue set via
rte_event_eth_rx_adapter_queue_conf::ev::queue_id.
It should also mark rte_event_vector::union_valid and fill
rte_event_vector::port, rte_event_vector::queue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
3 years agoeventdev: introduce event vector capability
Pavan Nikhilesh [Wed, 31 Mar 2021 09:29:55 +0000 (14:59 +0530)]
eventdev: introduce event vector capability

Introduce rte_event_vector datastructure which is capable of holding
multiple uintptr_t of the same flow thereby allowing applications
to vectorize their pipeline and reducing the complexity of pipelining
the events across multiple stages.
This approach also reduces the scheduling overhead on a event device.

Add a event vector mempool create handler to create mempools based on
the best mempool ops available on a given platform.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
3 years agoevent/octeontx2: use always virtual counter for timer
Pavan Nikhilesh [Tue, 23 Mar 2021 08:44:38 +0000 (14:14 +0530)]
event/octeontx2: use always virtual counter for timer

Use virtual counter for estimating current bucket as PMU cannot be
reliably used to estimate time.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agoevent/octeontx2: reduce chunk pool memory usage
Pavan Nikhilesh [Tue, 23 Mar 2021 08:44:37 +0000 (14:14 +0530)]
event/octeontx2: reduce chunk pool memory usage

Reduce amount of memory used by chunk pool when the mempool used
is OCTEONTX2 NPA.
Previously, the number of chunks configured when NPA is used is
equal to the number of timers requested plus the number of buckets
and if the max timeout is long enough w.r.t. resolution requested
there will a large number of buckets which would cause high memory
usage.
Reduce the number of chunks when NPA is used to the number of timers
requested as buckets that are processed chunk lists are automatically
freed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agoevent/octeontx2: optimize timer Arm routine
Pavan Nikhilesh [Tue, 23 Mar 2021 08:44:36 +0000 (14:14 +0530)]
event/octeontx2: optimize timer Arm routine

Use relaxed load exclusive when polling for other threads or
hardware to complete.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agoevent/octeontx2: simplify timer bucket estimation
Pavan Nikhilesh [Tue, 23 Mar 2021 08:44:35 +0000 (14:14 +0530)]
event/octeontx2: simplify timer bucket estimation

Simplify timer bucket estimation we need not align buckets to
power of 2 instead use reciprocal division to compute mod.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agoevent/octeontx2: support timer periodic mode
Shijith Thotton [Wed, 17 Mar 2021 08:04:21 +0000 (13:34 +0530)]
event/octeontx2: support timer periodic mode

Add support for periodic mode in event timer adapter.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agotest/event: add unit tests for periodic timer
Shijith Thotton [Wed, 17 Mar 2021 08:04:20 +0000 (13:34 +0530)]
test/event: add unit tests for periodic timer

Add tests to arm and cancel periodic timer.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agoeventdev: introduce adapter flags for periodic mode
Shijith Thotton [Wed, 17 Mar 2021 08:04:19 +0000 (13:34 +0530)]
eventdev: introduce adapter flags for periodic mode

A timer adapter in periodic mode can be used to arm periodic timers.
This patch adds flags used to advertise capability and configure timer
adapter in periodic mode. Capability flag should be set for adapters
which support periodic mode.

Below is a programming sequence on the usage:
/* check for periodic mode support by reading capability. */
rte_event_timer_adapter_caps_get(...);

/* create adapter in periodic mode by setting periodic flag
   (RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) and resolution. */
rte_event_timer_adapter_create_ext(...);

/* arm periodic timer of configured resolution */
rte_event_timer_arm_burst(...);

/* timer event will be periodically generated at configured
   resolution till cancel is called. */
while (running) { rte_event_dequeue_burst(...); }

/* cancel periodic timer which stops generating events */
rte_event_timer_cancel_burst(...);

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
3 years agoapp/eventdev: fix timeout accuracy
Pavan Nikhilesh [Thu, 25 Feb 2021 12:01:43 +0000 (17:31 +0530)]
app/eventdev: fix timeout accuracy

Round timeout ticks when converting from nanoseconds, this prevents
loss of accuracy and deviation from requested timeout value.

Fixes: d008f20bce23 ("app/eventdev: add event timer adapter as a producer")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
3 years agoevent/octeontx2: fix XAQ pool reconfigure
Pavan Nikhilesh [Fri, 19 Mar 2021 21:08:15 +0000 (02:38 +0530)]
event/octeontx2: fix XAQ pool reconfigure

When XAQ pool is being re-configured, and if the same memzone
is used for fc_mem when freeing the old mempool the fc_mem
will be incorrectly updated with the free count.

Fixes: ffa4ec0b6063 ("event/octeontx2: allow adapters to resize inflight buffers")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
3 years agoevent/dlb: remove driver
Timothy McDaniel [Sat, 20 Mar 2021 14:27:11 +0000 (19:57 +0530)]
event/dlb: remove driver

Remove event/dlb driver from DPDK code base.
Updated release note's removal section to reflect the same.

Also updated doc/guides/rel_notes/release_20_11.rst to fix the
the missing link issue due to removal of doc/guides/eventdevs/dlb.rst

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
3 years agotest/event: fix timeout accuracy
Pavan Nikhilesh [Sat, 6 Mar 2021 20:26:58 +0000 (01:56 +0530)]
test/event: fix timeout accuracy

Round timeout ticks when converting from nanoseconds, this prevents
loss of accuracy and deviation from requested timeout value.

Fixes: d1f3385d0076 ("test: add event timer adapter auto-test")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
3 years agoevent/sw: add xstats to expose progress details
Harry van Haaren [Mon, 8 Mar 2021 09:22:14 +0000 (09:22 +0000)]
event/sw: add xstats to expose progress details

Today it is difficult to know if the SW Eventdev PMD is making
forward progress when it runs an iteration of its service. This
commit adds two xstats to give better visibility to the application.

The new xstats provide an application with which Eventdev ports
received work in the last iteration of scheduling, as well if
forward progress was made by the scheduler.

This patch implements an xstat for the SW PMD that exposes a
bitmask of ports that were scheduled to. In the unlikely case
that the SW PMD instance has 64 or more ports, return UINT64_MAX.

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
3 years agoevent/dsw: use C11 built-ins for atomics
Mattias Rönnblom [Tue, 26 Jan 2021 16:36:50 +0000 (17:36 +0100)]
event/dsw: use C11 built-ins for atomics

Use C11-style GCC built-in functions for atomic operations.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
3 years agoeal/windows: fix return codes of pthread shim layer
Tal Shnaiderman [Mon, 12 Apr 2021 10:37:44 +0000 (13:37 +0300)]
eal/windows: fix return codes of pthread shim layer

The macro definitions of the following pthread functions
return incorrect values from the inner function return code.

While pthread_barrier_init(), pthread_barrier_destroy() and
pthread_cancel() return 0 in a case of success and non-zero (errno) value
otherwise the shimming functions InitializeSynchronizationBarrier,
DeleteSynchronizationBarrier and TerminateThread return FALSE (0)
in a case of failure and TRUE(1) in a case of success.

This issue was undetected as none of the functions return codes were
checked until such check was added in
commit 34cc55cce6b1 ("eal: fix race in control thread creation")
exposing the issue by failing pthread_barrier_init()
and rte_eal_init() on Windows as a result.

The fix aligned the return value of the 3 function with the expected
pthread API return values.

Fixes: e8428a9d89f1 ("eal/windows: add some basic functions and macros")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
3 years agocommon/mlx5: add missing internal tags
Tal Shnaiderman [Sun, 11 Apr 2021 12:21:36 +0000 (15:21 +0300)]
common/mlx5: add missing internal tags

Several functions introduced in the addition of the Windows support
to mlx5 were missing the __rte_internal tag.
This miss is better revealed when symbols became exported on Linux too,
and it is caught by the symbol checker with --buildtype=debug.

Fixes: 1552fb287166 ("common/mlx5: add alloc/dealloc PD on Windows")
Fixes: 1969ee424405 ("common/mlx5: add UMEM reg/dereg functions on Windows")
Fixes: ba420719823c ("common/mlx5: add reg/dereg MR on Windows")
Fixes: 56ea803e878e ("build: remove Windows export symbol list")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
3 years agoapp/flow-perf: fix encap/decap actions
Wisam Jaddo [Sun, 14 Mar 2021 09:54:27 +0000 (11:54 +0200)]
app/flow-perf: fix encap/decap actions

When using decap actions it's been set to the data to decap
into the encap_data instead of decap_data, as a results we end
up with bad encap and decap data in many cases.

Fixes: 0c8f1f4ab90e ("app/flow-perf: support raw encap/decap actions")
Cc: stable@dpdk.org
Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agoapp/flow-perf: report first flow latency
Wisam Jaddo [Sun, 14 Mar 2021 09:54:26 +0000 (11:54 +0200)]
app/flow-perf: report first flow latency

Starting from this commit the app will always
report the first flow latency.

This is useful in debugging to check the first
flow insertion before any caching effect.

Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agoapp/flow-perf: fix IPv6 source address increment
Wisam Jaddo [Sun, 14 Mar 2021 09:54:25 +0000 (11:54 +0200)]
app/flow-perf: fix IPv6 source address increment

Currently the memset() will not set a correct src ip that represent
the incremental value of the counter.

This commit will fix this and each flow will have correct IPv6.src
that it's incremental from previous flow and equal to the decimal
values.

Fixes: bf3688f1e816 ("app/flow-perf: add insertion rate calculation")
Cc: stable@dpdk.org
Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agoapp/flow-perf: skip dumps for masked ports
Wisam Jaddo [Sun, 14 Mar 2021 09:54:24 +0000 (11:54 +0200)]
app/flow-perf: skip dumps for masked ports

Take into consideration that the user may call portmask for
any run, thus the app should always check if port is needed
to collect and report or not.

Fixes: 070316d01d3e ("app/flow-perf: add multi-core rule insertion and deletion")
Fixes: d8099d7ecbd0 ("app/flow-perf: split dump functions")
Cc: stable@dpdk.org
Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agoapp/flow-perf: rename records of used CPU time
Wisam Jaddo [Sun, 14 Mar 2021 09:54:23 +0000 (11:54 +0200)]
app/flow-perf: rename records of used CPU time

create_flow and create_meter are not correct names since those
are records that contain creation and deletion, which makes
them more of a record for such data.

Fixes: d8099d7ecbd0 ("app/flow-perf: split dump functions")
Cc: stable@dpdk.org
Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agoapp/flow-perf: add runtime option to use unique data
Wisam Jaddo [Sun, 14 Mar 2021 09:54:22 +0000 (11:54 +0200)]
app/flow-perf: add runtime option to use unique data

Current support for unique data is to compile with config.h
var FIXED_VALUES as 0, and this is only supported on
compilation time, as a result the user may use only single
mode for each compilation.

Starting with this commit the user will have the ability to
use this feature on the fly by using this new option:
--unique-data

Example of unique data usage:
Insert many rules with different encap data for a flows that
have encap action in it.

Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agoapp/flow-perf: use more generic wrapper to get cycles
Wisam Jaddo [Sun, 14 Mar 2021 09:54:21 +0000 (11:54 +0200)]
app/flow-perf: use more generic wrapper to get cycles

rdtsc() is x86 related, while this might fail for other archs,
so it's better to use more generic API for cycles measurement.

Signed-off-by: Wisam Jaddo <wisamm@nvidia.com>
Acked-by: Alexander Kozyrev <akozyrev@nvidia.com>
3 years agonet/dpaa2: fix RSS distribution size field
Hemant Agrawal [Thu, 8 Apr 2021 09:17:43 +0000 (14:47 +0530)]
net/dpaa2: fix RSS distribution size field

RSS distribution field is U64, while the DPAA2 code
was using integer value, which is causing a issue
for MPLS having bit position 33.
This patch fixes the code to use unsigned long long.

Fixes: 1832bc8ee8d4 ("net/dpaa2: support MPLS distribution")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
3 years agonet/enic: fix flow initialization error handling
John Daley [Thu, 8 Apr 2021 23:06:31 +0000 (16:06 -0700)]
net/enic: fix flow initialization error handling

Fix a rare case in rte_flow initialization where the action hash table
is not freed if allocating a NIC match table fails.

Fixes: ea7768b5bba8 ("net/enic: add flow implementation based on Flow Manager API")
Cc: stable@dpdk.org
Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
3 years agonet/hns3: fix code style
Hongbo Zheng [Wed, 31 Mar 2021 10:01:44 +0000 (18:01 +0800)]
net/hns3: fix code style

Add one space before the left brace to solve the static warning.

Fixes: 63e05f19b82b ("net/hns3: support Rx descriptor status query")

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: delete redundant blank line
Hongbo Zheng [Wed, 31 Mar 2021 10:01:43 +0000 (18:01 +0800)]
net/hns3: delete redundant blank line

Delete redundant blank line in "hns3vf_check_event_cause" to
solve the static warning.

Fixes: a5475d61fa34 ("net/hns3: support VF")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: support get device version when dump register
Chengwen Feng [Wed, 31 Mar 2021 10:01:42 +0000 (18:01 +0800)]
net/hns3: support get device version when dump register

Support get device version which is equal to the firmware version
when dump register.

Fixes: 936eda25e8da ("net/hns3: support dump register")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix VF mailbox head field
Chengwen Feng [Wed, 31 Mar 2021 10:01:41 +0000 (18:01 +0800)]
net/hns3: fix VF mailbox head field

Currently, the VF mailbox synchronization communication is based on
three fields: head/tail/lost, when head equals tail plus lost, it
means the response is received successfully.

The head field indicates the number of requests that are successfully
sent. If the request sending fails, it should not be updated.

This patch fix the above bug by roll back updates when the sending
fails.

Fixes: 463e748964f5 ("net/hns3: support mailbox")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix flow counter value
Chengwen Feng [Wed, 31 Mar 2021 10:01:40 +0000 (18:01 +0800)]
net/hns3: fix flow counter value

User could create flow rules with specified counter by the action of
RTE_FLOW_ACTION_TYPE_COUNT, but the counter may retain the original
value when create.

This patch fix the bug by read the counter when creating the rule
because the counter is read-clear.

Fixes: fcba820d9b9e ("net/hns3: support flow director")
Cc: stable@dpdk.org
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix flow control exception
Huisong Li [Wed, 31 Mar 2021 10:01:39 +0000 (18:01 +0800)]
net/hns3: fix flow control exception

In multi-TC scenarios, MAC pause is not supported. Otherwise, only
TC0 can trigger pause frames, and other TCs cannot trigger pause
frames. In this case, flow control does not meet the expectation.

Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
3 years agonet/hns3: fix rollback after setting PVID failure
Chengchang Tang [Wed, 31 Mar 2021 10:01:38 +0000 (18:01 +0800)]
net/hns3: fix rollback after setting PVID failure

Currently, three hardware operations are involved in setting the PVID.
If any operation fails, a failure will be returned. And there may be
residual hardware configurations because no rollback is performed.

This patch adds rollback operation for setting PVID to avoid residual
hardware configuration after the PVID fails to be configured.

Fixes: 411d23b9eafb ("net/hns3: support VLAN")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>