dpdk.git
2 years agoapp/eventdev: add option to enable per port pool
Pavan Nikhilesh [Thu, 1 Jul 2021 06:07:59 +0000 (11:37 +0530)]
app/eventdev: add option to enable per port pool

Add option to configure unique mempool for each ethernet device
port. The new option available with `pipeline_atq` and
`pipeline_queue` tests.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agoevent/octeontx2: configure aura backpressure
Pavan Nikhilesh [Mon, 14 Jun 2021 19:24:25 +0000 (00:54 +0530)]
event/octeontx2: configure aura backpressure

In poll mode driver of octeontx2 the RQ is connected to a CQ and it is
responsible for asserting backpressure to the CGX channel.
When event eth Rx adapter is configured, the RQ is connected to a event
queue, to enable backpressure we need to configure AURA assigned to a
given RQ to backpressure CGX channel.
Event device expects unique AURA to be configured per ethernet device.
If multiple RQ from different ethernet devices use the same AURA,
the backpressure will be disabled, application can override this
using devargs:

-a 0002:0e:00.0,force_rx_bp=1

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agomempool/octeontx2: fix shift calculation
Pavan Nikhilesh [Mon, 14 Jun 2021 19:24:24 +0000 (00:54 +0530)]
mempool/octeontx2: fix shift calculation

Shift is used to generate an 8-bit saturate value from the current
aura used count. The shift value should be derived from the log2 of
block count if it is greater than 256 else the shift should be 0.

Fixes: 7bcc47cbe2fa ("mempool/octeontx2: add mempool alloc op")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agoevent/dsw: flag adapters capabilities
Mattias Rönnblom [Mon, 14 Jun 2021 10:23:58 +0000 (12:23 +0200)]
event/dsw: flag adapters capabilities

Set the appropriate capability flags for the RX, crypto and timer
eventdev adapters to use.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Tested-by: Heng Wang <heng.wang@ericsson.com>
2 years agoevent/cnxk: fix clang build on Arm
Ruifeng Wang [Thu, 10 Jun 2021 07:25:10 +0000 (07:25 +0000)]
event/cnxk: fix clang build on Arm

clang-10 build issue log:
drivers/event/cnxk/cnxk_tim_worker.h:372:23:
warning: value size does not match register size
specified by the constraint and modifier [-Wasm-operand-widths]
                             : [rem] "=&r"(rem)
                                           ^
cnxk/cnxk_tim_worker.h:365:17: note: use constraint modifier "w"
                             "ldxr %[rem], [%[crem]]  \n"
                                             ^~~~~~
                                             %w[rem]

Changed variable type to match register size, which placates clang.

Fixes: 300b796262a1 ("event/cnxk: add timer arm routine")
Cc: stable@dpdk.org
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agoapp/eventdev: remove unnecessary barrier from order test
Feifei Wang [Mon, 10 May 2021 06:11:48 +0000 (14:11 +0800)]
app/eventdev: remove unnecessary barrier from order test

For "order_launch_lcores" function, wmb after that the main lcore
updates the variable "t->err", which represents the end of the test
signal, is unnecessary. Because after the main lcore updates this
signal variable, it will jump out of the launch function loop, and wait
other lcores stop or return error in the main function(evt_main.c).
During this time, there is no storing operation and thus no need for
wmb.

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agovdpa/mlx5: fix TSO offload without checksum
Xueming Li [Sun, 13 Jun 2021 12:51:39 +0000 (20:51 +0800)]
vdpa/mlx5: fix TSO offload without checksum

Packet was corrupted when TSO requested without CSUM update.

Enables CSUM automatically if only TSO requested.

Fixes: 2aa8444b0084 ("vdpa/mlx5: support stateless offloads")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: use DPDK allocations for in-flight data
Maxime Coquelin [Tue, 29 Jun 2021 16:11:33 +0000 (18:11 +0200)]
vhost: use DPDK allocations for in-flight data

Inflight metadata are allocated using glibc's calloc.
This patch converts them to rte_zmalloc_socket to take
care of the NUMA affinity.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: allocate all data on same node as virtqueue
Maxime Coquelin [Tue, 29 Jun 2021 16:11:32 +0000 (18:11 +0200)]
vhost: allocate all data on same node as virtqueue

This patch saves the NUMA node the virtqueue is allocated
on at init time, in order to allocate all other data on the
same node.

While most of the data are allocated before numa_realloc()
is called and so the data will be reallocated properly, some
data like the log cache are most likely allocated after.

For the virtio device metadata, we decide to allocate them
on the same node as the VQ 0.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: improve NUMA reallocation
Maxime Coquelin [Tue, 29 Jun 2021 16:11:31 +0000 (18:11 +0200)]
vhost: improve NUMA reallocation

This patch improves the numa_realloc() function by making use
of rte_realloc_socket(), which takes care of the memory copy
and freeing of the old data.

Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: fix NUMA reallocation with multi-queue
Maxime Coquelin [Tue, 29 Jun 2021 16:11:30 +0000 (18:11 +0200)]
vhost: fix NUMA reallocation with multi-queue

Since the Vhost-user device initialization has been reworked,
enabling the application to start using the device as soon as
the first queue pair is ready, NUMA reallocation no more
happened on queue pairs other than the first one since
numa_realloc() was returning early if the device was running.

This patch fixes this issue by reallocating the device metadata
only if the device is running. For the virtqueues, a vring state
change notification is sent to notify the application of its
disablement. Since the callback is supposed to be blocking, it
is safe to reallocate it afterwards.

Fixes: d0fcc38f5fa4 ("vhost: improve device readiness notifications")
Cc: stable@dpdk.org
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: fix missing cache logging NUMA realloc
Maxime Coquelin [Tue, 29 Jun 2021 16:11:29 +0000 (18:11 +0200)]
vhost: fix missing cache logging NUMA realloc

When the guest allocates virtqueues on a different NUMA node
than the one the Vhost metadata are allocated, both the Vhost
device struct and the virtqueues struct are reallocated.

However, reallocating the log cache on the new NUMA node was
not done. This patch fixes this by reallocating it if it has
been allocated already, which means a live-migration is
on-going.

Fixes: 1818a63147fb ("vhost: move dirty logging cache out of virtqueue")
Cc: stable@dpdk.org
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: fix missing guest pages table NUMA realloc
Maxime Coquelin [Tue, 29 Jun 2021 16:11:28 +0000 (18:11 +0200)]
vhost: fix missing guest pages table NUMA realloc

When the guest allocates virtqueues on a different NUMA node
than the one the Vhost metadata are allocated, both the Vhost
device struct and the virtqueues struct are reallocated.

However, reallocating the guest pages table was missing, which
likely causes at least one cross-NUMA accesses for every burst
of packets.

This patch reallocates this table on the same NUMA node as the
other metadata.

Fixes: e246896178e6 ("vhost: get guest/host physical address mappings")
Cc: stable@dpdk.org
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agovhost: fix missing memory table NUMA realloc
Maxime Coquelin [Tue, 29 Jun 2021 16:11:27 +0000 (18:11 +0200)]
vhost: fix missing memory table NUMA realloc

When the guest allocates virtqueues on a different NUMA node
than the one the Vhost metadata are allocated, both the Vhost
device struct and the virtqueues struct are reallocated.

However, reallocating the Vhost memory table was missing, which
likely causes at least one cross-NUMA accesses for every burst
of packets.

This patch reallocates this table on the same NUMA node as the
other metadata.

Fixes: 552e8fd3d2b4 ("vhost: simplify memory regions handling")
Cc: stable@dpdk.org
Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2 years agonet/ice: support default RSS for IP fragment packet
Wenjun Wu [Mon, 5 Jul 2021 06:43:11 +0000 (14:43 +0800)]
net/ice: support default RSS for IP fragment packet

This patch adds default RSS support for IPv4 and IPv6 fragment packet.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: fix multi-process shared data
Dapeng Yu [Mon, 21 Jun 2021 07:23:53 +0000 (15:23 +0800)]
net/i40e: fix multi-process shared data

The rte_eth_devices array is not in share memory, it should not be
referenced by i40e_adapter which is shared by primary and secondary.
Any process set i40e_adapter->eth_dev will corrupt another process's
context.

The patch removed the field "eth_dev" from i40e_adapter.
Now, when the data paths try to access the rte_eth_dev_data instance,
they should replace adapter->eth_dev->data with adapter->pf.dev_data.

Fixes: 4861cde46116 ("i40e: new poll mode driver")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: improve vector Tx performance
Feifei Wang [Wed, 30 Jun 2021 06:40:36 +0000 (14:40 +0800)]
net/i40e: improve vector Tx performance

For i40e vector Tx path, if tx_offload is set as FAST_FREE_MBUF mode,
no mbuf fast free operations are executed. To fix this, add mbuf fast
free mode for vector Tx path.

Furthermore, for i40e vector Tx path, if implement FAST_FREE_MBUF mode,
it means per-queue all mbufs come from the same mempool and have
refcnt = 1. Thus we can use bulk free of the buffers when mbuf fast free
mode is enabled.

For vector path in arm platform:
In n1sdp, performance is improved by 18.4%;
In thunderx2, performance is improved by 23%.

For vector path in x86 platform:
No performance changes.

Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2 years agonet/i40e: improve scalar Tx performance
Feifei Wang [Wed, 30 Jun 2021 06:40:35 +0000 (14:40 +0800)]
net/i40e: improve scalar Tx performance

For i40e scalar Tx path, if implement FAST_FREE_MBUF mode, it means
per-queue all mbufs come from the same mempool and have refcnt = 1.

Thus we can use bulk free of the buffers when mbuf fast free mode is
enabled.

Following are the test results with this patch:

MRR L3FWD Test:
two ports & bi-directional flows & one core
RX API: i40e_recv_pkts_bulk_alloc
TX API: i40e_xmit_pkts_simple
ring_descs_size = 1024;
Ring_I40E_TX_MAX_FREE_SZ = 64;
tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH = 32;
tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH = 32;

For scalar path in arm platform with default 'tx_rs_thresh':
In n1sdp, performance is improved by 7.9%;
In thunderx2, performance is improved by 7.6%.

For scalar path in x86 platform with default 'tx_rs_thresh':
performance is improved by 4.7%.

Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2 years agonet/ice: add option for setting HW debug mask
Haiyue Wang [Tue, 29 Jun 2021 16:40:33 +0000 (00:40 +0800)]
net/ice: add option for setting HW debug mask

The HW debug mask is always zero, so user can't enable the related debug
function like ICE_DBG_XXX etc, add the devarg 'hw_debug_mask' to set the
debug mask log output at runtime.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: fix flow director input set conflict
Beilei Xing [Thu, 24 Jun 2021 07:29:56 +0000 (15:29 +0800)]
net/i40e: fix flow director input set conflict

Currently, there'll be conflict error when running
the following commands:
1. flow create 0 ingress
     pattern eth / ipv4 / udp src is 32 / end
     actions queue index 2 / end
2. flow destroy 0 rule 0
3. flow create 0 ingress
     pattern eth / ipv4 / udp dst is 32 / end
     actions queue index 2 / end

This patch fixes the input set conflict issue.

Fixes: 42044b69c67d ("net/i40e: support input set selection for FDIR")
Fixes: 4a072ad43442 ("net/i40e: fix flow director config after flow validate")
Cc: stable@dpdk.org
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Tested-by: Lingli Chen <linglix.chen@intel.com>
2 years agonet/iavf: check Tx packet with correct UP and queue
Ting Xu [Thu, 1 Jul 2021 11:41:23 +0000 (19:41 +0800)]
net/iavf: check Tx packet with correct UP and queue

Add check in the Tx packet preparation function, to guarantee that the
packet with specific user priority is distributed to the correct Tx
queue according to the configured Tx queue TC mapping.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: query QoS capabilities and set queue TC mapping
Ting Xu [Thu, 1 Jul 2021 11:41:22 +0000 (19:41 +0800)]
net/iavf: query QoS capabilities and set queue TC mapping

This patch added the support for VF to config the ETS-based Tx QoS,
including querying current QoS configuration from PF and config queue TC
mapping. PF QoS is configured in advance and the queried info is
provided to the user for future usage. VF queues are mapped to different
TCs in PF through virtchnl.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice: support QoS config VF bandwidth in DCF
Ting Xu [Thu, 1 Jul 2021 11:41:21 +0000 (19:41 +0800)]
net/ice: support QoS config VF bandwidth in DCF

This patch supports the ETS-based QoS configuration. It enables the DCF
to configure bandwidth limits for each VF VSI of different TCs. A
hierarchy scheduler tree is built with port, TC and VSI nodes.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice: support DCF link status event handling
Ting Xu [Thu, 1 Jul 2021 11:41:20 +0000 (19:41 +0800)]
net/ice: support DCF link status event handling

When link status changes, DCF will receive virtchnl PF event message.
Add support to handle this event, change link status and update link
info.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice/base: support DCF query port ETS adminq
Ting Xu [Thu, 1 Jul 2021 11:41:19 +0000 (19:41 +0800)]
net/ice/base: support DCF query port ETS adminq

In the adminq command query port ETS function, the root node teid is
needed. However, for DCF, the root node is not initialized, which will
cause error when we refer to the variable. In this patch, we will check
whether the root node is available or not first.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agocommon/iavf: support ETS-based QoS offload configuration
Ting Xu [Thu, 1 Jul 2021 11:41:18 +0000 (19:41 +0800)]
common/iavf: support ETS-based QoS offload configuration

This patch adds new virtchnl opcodes and structures for QoS
configuration, which includes:
1. VIRTCHNL_VF_OFFLOAD_TC, to negotiate the capability supporting QoS
configuration. If VF and PF both have this flag, then the ETS-based QoS
offload function is supported.
2. VIRTCHNL_OP_DCF_CONFIG_BW, DCF is supposed to configure min and max
bandwidth for each VF per enabled TCs. To make the VSI node bandwidth
configuration work, DCF also needs to configure TC node bandwidth
directly.
3. VIRTCHNL_OP_GET_QOS_CAPS, VF queries current QoS configuration, such
as enabled TCs, arbiter type, up2tc and bandwidth of VSI node. The
configuration is previously set by DCB and DCF, and now is the potential
QoS capability of VF. VF can take it as reference to configure queue TC
mapping.
4. VIRTCHNL_OP_CONFIG_TC_MAP, set VF queues to TC mapping for all Tx and
Rx queues. Queues mapping to one TC should be continuous and all
allocated queues should be mapped.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice: add AVX2 offload Rx
Wenzhuo Lu [Tue, 29 Jun 2021 02:29:21 +0000 (10:29 +0800)]
net/ice: add AVX2 offload Rx

Add a specific path for RX AVX2.
In this path, support the HW offload features, like,
checksum, VLAN stripping, RSS hash.
This path is chosen automatically according to the
configuration.

'inline' is used, then the duplicate code is generated
by the compiler.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
2 years agonet/ice: add AVX2 offload Tx
Wenzhuo Lu [Tue, 29 Jun 2021 02:29:20 +0000 (10:29 +0800)]
net/ice: add AVX2 offload Tx

Add a specific path for TX AVX2.
In this path, support the HW offload features, like,
checksum insertion, VLAN insertion.
This path is chosen automatically according to the
configuration.

'inline' is used, then the duplicate code is generated
by the compiler.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Leyi Rong <leyi.rong@intel.com>
2 years agonet/ice/base: fix first profile mask
Wenjun Wu [Mon, 21 Jun 2021 08:59:23 +0000 (16:59 +0800)]
net/ice/base: fix first profile mask

Since each PF does not share the same structure space, the first
mask value should start at 0 instead of hw->pf_id * per_pf to avoid
address overflow. Otherwise, address space will overlap when
masks.first + masks.count > ICE_PROF_MASK_COUNT, and it may lead to
unexpected variable assignment, which causes segmentation fault.

Fixes: 9467486f179f ("net/ice/base: enable masking for RSS and FD field vectors")
Cc: stable@dpdk.org
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: fix L2 payload RSS mask input set
Alvin Zhang [Fri, 18 Jun 2021 08:38:21 +0000 (16:38 +0800)]
net/i40e: fix L2 payload RSS mask input set

Allow VLAN tag being added to L2 payload packet type RSS input set.

Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2 years agonet/i40e: fix available RSS hash function
Steve Yang [Mon, 21 Jun 2021 08:03:42 +0000 (08:03 +0000)]
net/i40e: fix available RSS hash function

i40e can support following rss hash function types: default/toeplitz,
symmetric toeplitz, and simple_xor. However, when filter engine parses
pattern action, it only supports symmetric toeplitz & default.

Add simple_xor and toeplitz hash functions support when parsing pattern
action.

Fixes: ef4c16fd9148 ("net/i40e: refactor RSS flow")
Cc: stable@dpdk.org
Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2 years agonet/ice: fix overflow in maximum packet length config
Tudor Cornea [Tue, 15 Jun 2021 10:38:34 +0000 (13:38 +0300)]
net/ice: fix overflow in maximum packet length config

The len variable, used in the computation of max_pkt_len could overflow,
if used to store the result of the following computation:

ICE_SUPPORT_CHAIN_NUM * rxq->rx_buf_len

Since, we could define the mbuf size to have a large value (i.e 13312),
and ICE_SUPPORT_CHAIN_NUM is defined as 5, the computation mentioned
above could potentially result in a value which might be bigger than
MAX_USHORT.

The result will be that Jumbo Frames will not work properly

Fixes: 1b009275e2c8 ("net/ice: add Rx queue init in DCF")
Cc: stable@dpdk.org
Signed-off-by: Tudor Cornea <tudor.cornea@keysight.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/i40e: fix data path selection in secondary process
Dapeng Yu [Wed, 9 Jun 2021 07:05:08 +0000 (15:05 +0800)]
net/i40e: fix data path selection in secondary process

The flag use_avx2 and use_avx512 are defined as local variables, they
will not be aware by the secondary process, then wrong data path is
selected. Fix the issue by moving them into struct i40e_adapter.

Fixes: 6ada10deac66 ("net/i40e: remove devarg use-latest-supported-vec")
Fixes: e6a6a138919f ("net/i40e: add AVX512 vector path")
Cc: stable@dpdk.org
Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: support flow director for GRE tunnel packet
Wenjun Wu [Wed, 2 Jun 2021 02:24:42 +0000 (10:24 +0800)]
net/iavf: support flow director for GRE tunnel packet

Support AVF FDIR for inner header of GRE tunnel packet.

+------------------------------+---------------------------------------+
|           Pattern            |            Input Set                  |
+------------------------------+---------------------------------------+
| eth/ipv4/gre/ipv4            | inner: src/dst ip, dscp               |
| eth/ipv4/gre/ipv4/udp        | inner: src/dst ip, dscp, src/dst port |
| eth/ipv4/gre/ipv4/tcp        | inner: src/dst ip, dscp, src/dst port |
| eth/ipv4/gre/eh/ipv6         | inner: src/dst ip, tc                 |
| eth/ipv4/gre/eh/ipv6/udp     | inner: src/dst ip, tc, src/dst port   |
| eth/ipv4/gre/eh/ipv6/tcp     | inner: src/dst ip, tc, src/dst port   |
| eth/ipv6/gre/ipv4            | inner: src/dst ip, dscp               |
| eth/ipv6/gre/ipv4/udp        | inner: src/dst ip, dscp, src/dst port |
| eth/ipv6/gre/ipv4/tcp        | inner: src/dst ip, dscp, src/dst port |
| eth/ipv6/gre/ipv6            | inner: src/dst ip, tc                 |
| eth/ipv6/gre/ipv6/udp        | inner: src/dst ip, tc, src/dst port   |
| eth/ipv6/gre/ipv6/tcp        | inner: src/dst ip, tc, src/dst port   |
+------------------------------+---------------------------------------+

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: support RSS for GRE tunnel packet
Wenjun Wu [Wed, 2 Jun 2021 02:24:41 +0000 (10:24 +0800)]
net/iavf: support RSS for GRE tunnel packet

Support AVF RSS for inner header of GRE tunnel packet. It supports
RSS based on fields inner IP src + dst address and TCP/UDP src + dst
port.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agocommon/iavf: add GRE header type
Wenjun Wu [Wed, 2 Jun 2021 02:24:40 +0000 (10:24 +0800)]
common/iavf: add GRE header type

Add a virtchnl protocol header type to support AVF FDIR and RSS for GRE.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: support flow pattern for GRE
Wenjun Wu [Wed, 2 Jun 2021 02:24:39 +0000 (10:24 +0800)]
net/iavf: support flow pattern for GRE

Add GRE pattern support for AVF FDIR and RSS.

Patterns are listed below:
  1. eth/ipv4/gre/ipv4
  2. eth/ipv4/gre/ipv6
  3. eth/ipv6/gre/ipv4
  4. eth/ipv6/gre/ipv6
  5. eth/ipv4/gre/ipv4/tcp
  6. eth/ipv4/gre/ipv6/tcp
  7. eth/ipv4/gre/ipv4/udp
  8. eth/ipv4/gre/ipv6/udp
  9. eth/ipv6/gre/ipv4/tcp
  10. eth/ipv6/gre/ipv6/tcp
  11. eth/ipv6/gre/ipv4/udp
  12. eth/ipv6/gre/ipv6/udp

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice: support ESP/NATT flow director to match outer IP
Simei Su [Wed, 9 Jun 2021 02:49:51 +0000 (10:49 +0800)]
net/ice: support ESP/NATT flow director to match outer IP

This patch adds IPV4/IPV6 SRC/DST input set for ESP/NAT_T_ESP to
support outer IP match.

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/ice/base: support ESP flow director to match outer IP
Simei Su [Wed, 9 Jun 2021 02:49:50 +0000 (10:49 +0800)]
net/ice/base: support ESP flow director to match outer IP

Enable FDIR ESP for matching outer IPV4/IPV6 SRC/DST field.

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/iavf: support ESP flow director to match outer IP
Simei Su [Wed, 9 Jun 2021 02:49:49 +0000 (10:49 +0800)]
net/iavf: support ESP flow director to match outer IP

This patch adds IPV4/IPV6 SRC/DST input set for ESP to support
outer IP match.

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2 years agonet/octeontx_ep: fix null pointer access
Thierry Herbelot [Mon, 24 May 2021 08:59:35 +0000 (10:59 +0200)]
net/octeontx_ep: fix null pointer access

mz is known to be NULL. Do not use it to print a memzone name.

Fixes: 242e18c056890 ("net/octeontx_ep: add Rx queue setup and release")
Cc: stable@dpdk.org
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
2 years agonet/cnxk: support multi-segment vector Tx
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:23 +0000 (13:14 +0530)]
net/cnxk: support multi-segment vector Tx

Add multi segment Tx vector routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: enable TSO processing in vector Tx
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:22 +0000 (13:14 +0530)]
net/cnxk: enable TSO processing in vector Tx

Enable TSO offload in vector Tx burst function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: enable PTP processing in vector Tx
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:21 +0000 (13:14 +0530)]
net/cnxk: enable PTP processing in vector Tx

Enable PTP offload in vector Tx burst function. Since, we can
no-longer use a single LMT line for burst of 4, split the LMT
into two and transmit twice.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: enable VLAN processing in vector Tx
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:20 +0000 (13:14 +0530)]
net/cnxk: enable VLAN processing in vector Tx

Enable VLAN offload in vector Tx burst function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: enable PTP processing in vector Rx
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:19 +0000 (13:14 +0530)]
net/cnxk: enable PTP processing in vector Rx

Enable PTP offload in vector Rx burst function, use vector path
for processing mbufs and finally switch to scalar when extracting
timestamp.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: support multi-segment vector Rx
Pavan Nikhilesh [Tue, 29 Jun 2021 07:44:18 +0000 (13:14 +0530)]
net/cnxk: support multi-segment vector Rx

Add multi-segment Rx vector routine, form the primary mbufs using
vector path switch to scalar path when extracting segments.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/octeontx2: support link status
Harman Kalra [Tue, 22 Jun 2021 20:05:54 +0000 (01:35 +0530)]
net/octeontx2: support link status

Adding a new callback for reading the link status. PF can read it's
link status and can forward the same to VF once it comes up.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agocommon/octeontx2: send link event to VF
Harman Kalra [Tue, 22 Jun 2021 20:05:53 +0000 (01:35 +0530)]
common/octeontx2: send link event to VF

Currently link event is only sent to the PF by AF as soon as it comes
up, or in case of any physical change in link. PF will broadcast
these link events to all its VFs as soon as it receives it.
But no event is sent when a new VF comes up, hence it will not have
the link status.
Adding support for sending link status to the VF once it comes up
successfully.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agonet/octeontx2: use runtime LSO format indices
Nithin Dabilpuram [Fri, 18 Jun 2021 13:06:06 +0000 (18:36 +0530)]
net/octeontx2: use runtime LSO format indices

Currently LSO formats setup initially are expected to be
compile time constants and start from 0.

Change the logic in slow and fast path so that LSO format indexes
are only determined runtime.

Fixes: 3b635472a998 ("net/octeontx2: support TSO offload")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/octeontx2: fix flow creation limit on CN98xx
Satheesh Paul [Tue, 1 Jun 2021 10:25:51 +0000 (15:55 +0530)]
net/octeontx2: fix flow creation limit on CN98xx

CN96xx and CN98xx have 4096 and 16384 MCAM entries respectively.
Aligning the code with the same numbers.

Fixes: 092b3834185 ("net/octeontx2: add flow init and fini")
Cc: stable@dpdk.org
Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2 years agonet/octeontx2: support fast free for inline IPsec
Tejasree Kondoj [Wed, 12 May 2021 10:11:43 +0000 (15:41 +0530)]
net/octeontx2: support fast free for inline IPsec

Add support for DEV_TX_OFFLOAD_MBUF_FAST_FREE for inline IPsec path

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2 years agonet/cnxk: support marking and VLAN tagging
Satheesh Paul [Wed, 23 Jun 2021 04:47:02 +0000 (10:17 +0530)]
net/cnxk: support marking and VLAN tagging

This patch adds support for mark, flag, VLAN pop and
push flow actions.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
2 years agonet/cnxk: support multicast filter
Sunil Kumar Kori [Wed, 23 Jun 2021 04:47:01 +0000 (10:17 +0530)]
net/cnxk: support multicast filter

Patch adds multicast filter support for cn9k and cn10k platforms.

CGX DMAC filter table(32 entries) is divided among all LMACs
connected to it i.e. if CGX has 4 LMACs then each LMAC can have
up to 8 filters. If CGX has 1 LMAC then it can have up to 32
filters.

Above mentioned filter table is used to install unicast and multicast
DMAC address filters. Unicast filters are installed via
rte_eth_dev_mac_addr_add API while multicast filters are installed
via rte_eth_dev_set_mc_addr_list API.

So in total, supported MAC filters are equal to DMAC filters plus
mcast filters.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support RETA and RSS hash
Satha Rao [Wed, 23 Jun 2021 04:47:00 +0000 (10:17 +0530)]
net/cnxk: support RETA and RSS hash

This patch will implement RETA and RSS hash apis. Also added
device argument to lock rx context.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2 years agonet/cnxk: support clock read
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:59 +0000 (10:16 +0530)]
net/cnxk: support clock read

Patch implements read raw clock operation for cn9k and
cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support time read/write/adjust
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:58 +0000 (10:16 +0530)]
net/cnxk: support time read/write/adjust

Patch implements read/write/adjust time operations for
cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support Rx/Tx timestamp read
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:57 +0000 (10:16 +0530)]
net/cnxk: support Rx/Tx timestamp read

Patch implements Rx/Tx timestamp read operations for cn9k
and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support timesync operations
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:56 +0000 (10:16 +0530)]
net/cnxk: support timesync operations

Patch implements timesync enable/disable operations for
cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support base PTP timesync
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:55 +0000 (10:16 +0530)]
net/cnxk: support base PTP timesync

Base PTP timesync support is added for cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: get PTP status
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:54 +0000 (10:16 +0530)]
net/cnxk: get PTP status

Once PTP status is changed at H/W i.e. enable/disable then
it is propagated to user via registered callback.

So corresponding callback is registered to get PTP status.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support flow RSS
Satheesh Paul [Wed, 23 Jun 2021 04:46:53 +0000 (10:16 +0530)]
net/cnxk: support flow RSS

Added support for RSS action in rte flow code based on ROC.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
2 years agonet/cnxk: support registers dump
Satha Rao [Wed, 23 Jun 2021 04:46:52 +0000 (10:16 +0530)]
net/cnxk: support registers dump

With this patch implemented api to dump platform registers for
debug purposes.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2 years agonet/cnxk: support firmware version query
Satha Rao [Wed, 23 Jun 2021 04:46:51 +0000 (10:16 +0530)]
net/cnxk: support firmware version query

Add callback to get ethdev firmware version.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2 years agonet/cnxk: get flow operations
Satheesh Paul [Wed, 23 Jun 2021 04:46:50 +0000 (10:16 +0530)]
net/cnxk: get flow operations

This patch adds flow ops get operation to enable rte_flow_ops.A

This patch also add support for flow dev dump API.
Every flow rule added will be dumped in the below format.

MCAM Index:1881
Interface :NIX-RX (0)
Priority  :1
NPC RX Action:0X00000000404001
ActionOp:NIX_RX_ACTIONOP_UCAST (1)
PF_FUNC: 0X400
RQ Index:0X004
Match Id:0000
Flow Key Alg:0
NPC RX VTAG Action:0X00000000008100
VTAG0:relptr:0
lid:0X1
type:0
Patterns:
NPC_PARSE_NIBBLE_CHAN:000
NPC_PARSE_NIBBLE_LA_LTYPE:LA_ETHER
NPC_PARSE_NIBBLE_LB_LTYPE:NONE
NPC_PARSE_NIBBLE_LC_LTYPE:LC_IP
NPC_PARSE_NIBBLE_LD_LTYPE:LD_TCP
NPC_PARSE_NIBBLE_LE_LTYPE:NONE
LA_ETHER, hdr offset:0, len:0X6, key offset:0X8,\
Data:0X4AE124FC7FFF, Mask:0XFFFFFFFFFFFF
LA_ETHER, hdr offset:0XC, len:0X2, key offset:0X4, Data:0XCA5A,\
Mask:0XFFFF
LC_IP, hdr offset:0XC, len:0X8, key offset:0X10,\
Data:0X0A01010300000000, Mask:0XFFFFFFFF00000000
LD_TCP, hdr offset:0, len:0X4, key offset:0X18, Data:0X03450000,\
Mask:0XFFFF0000
MCAM Raw Data :
DW0     :0000CA5A01202000
DW0_Mask:0000FFFF0FF0F000
DW1     :00004AE124FC7FFF
DW1_Mask:0000FFFFFFFFFFFF
DW2     :0A01010300000000
DW2_Mask:FFFFFFFF00000000
DW3     :0000000003450000
DW3_Mask:00000000FFFF0000
DW4     :0000000000000000
DW4_Mask:0000000000000000
DW5     :0000000000000000
DW5_Mask:0000000000000000
DW6     :0000000000000000
DW6_Mask:0000000000000000

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2 years agonet/cnxk: support flow API
Kiran Kumar K [Wed, 23 Jun 2021 04:46:49 +0000 (10:16 +0530)]
net/cnxk: support flow API

Adding initial version of rte_flow support for cnxk family device.
Supported rte_flow ops are flow_validate, flow_create, flow_destroy,
flow_flush, flow_query, flow_isolate.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2 years agonet/cnxk: add NPC configuration
Kiran Kumar K [Wed, 23 Jun 2021 04:46:48 +0000 (10:16 +0530)]
net/cnxk: add NPC configuration

Adding support to configure NPC on device initialization. This involves
reading the MKEX and initializing the necessary data.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
2 years agonet/cnxk: support pending Tx mbuf cleanup
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:47 +0000 (10:16 +0530)]
net/cnxk: support pending Tx mbuf cleanup

Once mbufs are transmitted, mbufs are freed by H/W. No mbufs are
accumalated as a pending mbuf.
Hence operation is NOP for cnxk platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support close and reset
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:46 +0000 (10:16 +0530)]
net/cnxk: support close and reset

Patch implements device close and reset operations for cn9k
and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support queue infos query
Satha Rao [Wed, 23 Jun 2021 04:46:45 +0000 (10:16 +0530)]
net/cnxk: support queue infos query

Initial apis to get default queue information.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2 years agonet/cnxk: support extended statistics
Satha Rao [Wed, 23 Jun 2021 04:46:44 +0000 (10:16 +0530)]
net/cnxk: support extended statistics

Initial implementation of xstats operations.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2 years agonet/cnxk: support basic port/queue statistics
Satha Rao [Wed, 23 Jun 2021 04:46:43 +0000 (10:16 +0530)]
net/cnxk: support basic port/queue statistics

This patch implements regular port statistics and queue mapping set
api to get queue statistics

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2 years agonet/cnxk: support mempool operations query
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:42 +0000 (10:16 +0530)]
net/cnxk: support mempool operations query

CN9K and CN10K support platform specific mempool ops.
This patch implements API to validate whether given mempool
ops is supported or not.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support Rx interrupt
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:41 +0000 (10:16 +0530)]
net/cnxk: support Rx interrupt

Application may choose to enable/disable interrupts on Rx queues
so that application can select its processing if no packets are
available on queues for a longer period.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support EEPROM module queries
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:40 +0000 (10:16 +0530)]
net/cnxk: support EEPROM module queries

Patch implements eeprom module info get ethops for cn9k and
cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support link up/down operations
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:39 +0000 (10:16 +0530)]
net/cnxk: support link up/down operations

Patch implements link up/down ethdev operations for
cn9k and cn10k platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support flow control operations
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:38 +0000 (10:16 +0530)]
net/cnxk: support flow control operations

Patch implements set and get operations for flow control.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support Rx/Tx burst mode query
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:37 +0000 (10:16 +0530)]
net/cnxk: support Rx/Tx burst mode query

Patch implements ethdev operations to get Rx and Tx burst
mode.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support all multicast
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:36 +0000 (10:16 +0530)]
net/cnxk: support all multicast

L2 multicast packets can be allowed or blocked. Patch implements
corresponding ethops.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support DMAC filter
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:35 +0000 (10:16 +0530)]
net/cnxk: support DMAC filter

DMAC filter support is added for cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support promiscuous mode
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:34 +0000 (10:16 +0530)]
net/cnxk: support promiscuous mode

Add device operations to enable and disable promisc mode
for cn9k and cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support MTU set
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:33 +0000 (10:16 +0530)]
net/cnxk: support MTU set

This Patch implements mtu set dev op for cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: support MAC address set
Sunil Kumar Kori [Wed, 23 Jun 2021 04:46:32 +0000 (10:16 +0530)]
net/cnxk: support MAC address set

Default mac address set operation is implemented for
cn9k and cn10k platforms.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2 years agonet/cnxk: add device start and stop
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:31 +0000 (10:16 +0530)]
net/cnxk: add device start and stop

Add device start and stop operation callbacks for
CN9K and CN10K. Device stop is common for both platforms
while device start as some platform dependent portion where
the platform specific offload flags are recomputed and
the right Rx/Tx burst function is chosen.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: add vector Tx for CN10K
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:30 +0000 (10:16 +0530)]
net/cnxk: add vector Tx for CN10K

Add Tx burst vector version for CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agonet/cnxk: add multi-segment Tx for CN10K
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:29 +0000 (10:16 +0530)]
net/cnxk: add multi-segment Tx for CN10K

Add Tx burst multi-segment version for CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agonet/cnxk: add Tx burst for CN10K
Jerin Jacob [Wed, 23 Jun 2021 04:46:28 +0000 (10:16 +0530)]
net/cnxk: add Tx burst for CN10K

Add Tx burst scalar version for CN10K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2 years agonet/cnxk: add vector Rx for CN10K
Jerin Jacob [Wed, 23 Jun 2021 04:46:27 +0000 (10:16 +0530)]
net/cnxk: add vector Rx for CN10K

Add Rx burst vector version for CN10K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: add multi-segment Rx for CN10K
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:26 +0000 (10:16 +0530)]
net/cnxk: add multi-segment Rx for CN10K

Add Rx burst multi-segment version for CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agonet/cnxk: add Rx burst for CN10K
Jerin Jacob [Wed, 23 Jun 2021 04:46:25 +0000 (10:16 +0530)]
net/cnxk: add Rx burst for CN10K

Add Rx burst support for CN10K SoC.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2 years agonet/cnxk: add vector Tx for CN9K
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:24 +0000 (10:16 +0530)]
net/cnxk: add vector Tx for CN9K

Add Tx burst vector version for CN9K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agonet/cnxk: add multi-segment Tx for CN9K
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:23 +0000 (10:16 +0530)]
net/cnxk: add multi-segment Tx for CN9K

Add Tx burst multi-segment version for CN9K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agonet/cnxk: add Tx burst for CN9K
Jerin Jacob [Wed, 23 Jun 2021 04:46:22 +0000 (10:16 +0530)]
net/cnxk: add Tx burst for CN9K

Add Tx burst scalar version for CN9K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2 years agonet/cnxk: add vector Rx for CN9K
Jerin Jacob [Wed, 23 Jun 2021 04:46:21 +0000 (10:16 +0530)]
net/cnxk: add vector Rx for CN9K

Add Rx burst vector version for CN9K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: add multi-segment Rx for CN9K
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:20 +0000 (10:16 +0530)]
net/cnxk: add multi-segment Rx for CN9K

Add Rx burst multi-segmented version for CN9K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2 years agonet/cnxk: add Rx burst for CN9K
Jerin Jacob [Wed, 23 Jun 2021 04:46:19 +0000 (10:16 +0530)]
net/cnxk: add Rx burst for CN9K

Add Rx burst scalar version for CN9K.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: support queue start and stop
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:18 +0000 (10:16 +0530)]
net/cnxk: support queue start and stop

Add Rx/Tx queue start and stop callbacks for
CN9K and CN10K.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: support packet type
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:17 +0000 (10:16 +0530)]
net/cnxk: support packet type

Add support for packet type lookup on Rx to translate HW
specific types to  RTE_PTYPE_* defines

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: add Tx queue setup and release
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:16 +0000 (10:16 +0530)]
net/cnxk: add Tx queue setup and release

aDD tx queue setup and release for CN9K and CN10K.
Release is common while setup is platform dependent due
to differences in fast path Tx queue structures.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2 years agonet/cnxk: add Rx queue setup and release
Nithin Dabilpuram [Wed, 23 Jun 2021 04:46:15 +0000 (10:16 +0530)]
net/cnxk: add Rx queue setup and release

Add Rx queue setup and release op for CN9K and CN10K
SoC. Release is completely common while setup is platform
dependent due to fast path Rx queue structure variation.
Fastpath is platform dependent partly due to core cacheline
size difference.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>