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net/ice: add queue config in DCF
2020-06-30 Qi Zhangnet/ice: add queue config in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: init RSS during DCF start
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: add Rx queue init in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: add stop flag for device start/stop
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: complete queue setup in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: complete device configure in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: complete device info get in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice: init RSS and supported RXDID in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: replace RSS profile locks
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: fix VSI ID mask to 10 bits
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: choose TCP dummy packet by protocol
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: get tunnel type for recipe
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: support flow director for GTPU with outer...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: rename misleading variable
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: add commands for system diagnostic
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: support flow director for outer IP of...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: refactor to avoid need to retry
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-30 Qi Zhangnet/ice/base: adjust profile ID map locks
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove PPPoD from PPPoE bitmap
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: update IPv4 and IPv6 flow packet type...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add 1G SGMII PHY type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support E823L devices
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix initializing resource for field vector
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add more tunnel type for IPv4 and IPv6
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix reference count on VSI list update
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unused code for VSI list free
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add command to LLDP
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: distribute Tx queues evenly
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: adjust scheduler default bandwidth weight
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: clear error status before set FC
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: avoid PPPoE IPv4 overlap
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support checking all autoneg enable bits
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unimplemented function prototypes
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add entries in profile TCAM with priority
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix memory leak on error path
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unneeded variable
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix return value
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: update VSI handle to remaining VSI
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add rate limiter profile bit mask check
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: reset capabilities before parsing
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix advanced switch rule stale information
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support more PPPoE packet type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unnecessary case branches
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: return correct error code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add debug logs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: use macro for sizeof
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support RSS IPv6 prefix
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: adjust function signature style format
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unnecessary braces
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: give time for package download after...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: allow GENEVE and VXLAN rules with VLAN
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add NVM helper functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: initialize PHY configuration FEC fields
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add flow director completion report option
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support FDIR for L2TPV3 ESP AH and PFCP
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: cleanup comment formatting
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: group function prototypes together
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: change IPv6 training packet
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: refactor flow director filter swap
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: consolidate VF promiscuous mode
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: update maximum PHY type high index
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix ACL rules index
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add AUI media type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: improve VSI filters rebuild
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: gate devices from FW link override
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: report AOC PHY types as fiber
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: consolidate MAC config set
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: avoid undefined behavior
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: disable profile merge for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add macros to parse flow director Rx...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support flow director for non-IP packets
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-21 Qi Zhangnet/ice/base: fix tunnel type match word handling
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-19 Qi Zhangmaintainers: update for ice
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-19 Qi Zhangnet/ice: fix RSS for GTPU
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-11 Qi Zhangnet/ice: fix variable initialization
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-05 Qi Zhangnet/ice/base: fix DCF switch rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-05 Qi Zhangnet/ice/base: workaround unexpected rule deletion
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: update version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support flow director in virtual channel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support advanced RSS input set change
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add virtual channel protocol header
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support virtual channel for Flex RXD
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add DDP package query in virtual channel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add packet type aborted code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: update version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: remove unused code in switch rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update ixgbe features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update iavf features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update ice features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update i40e features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: enable RSS for PFCP/L2TP/ESP/AH
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: fix binary order for GTPU filter
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: change function to static
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: support PFCP and NAT-T of switch
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: move some macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: group case statements
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: handle critical FW error
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: improve GTPU extend header handle
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: allow profile based switch rules
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add default DCB parameters
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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