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net/iavf/base: rename register macro
2020-01-17 Qi Zhangnet/iavf/base: rename register macro
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: rename error code enum
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: remove unnecessary header file
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-26 Qi Zhangnet/ice: fix flow director conflict
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice: add flow mark hint
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice: fix flow type selection for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangdoc: add matching component list for ice
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice/base: update version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice: ignore error when removing RSS rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice/base: fix TCAM entry management
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-11 Qi Zhangnet/ice: free HW tables when device closed
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-08 Qi Zhangnet/ice/base: add new device IDs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-08 Qi Zhangnet/ice/base: fix symmetric hash configure
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-08 Qi Zhangnet/ice/base: fix ptype mapping pollution from GTP...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: improve misc code style
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: add QFI for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix switch rule programming for all profiles
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix flow raw field vector extraction
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix unexpected switch rule overwrite
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: initialize structures to zero
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: remove dead error condition
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: improve flow director masking
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: support GTPU TEID for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: update flow packet type bitmaps
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix NVGRE switch rule programming
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix adding PPPoE switch rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unused code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support switch for IPv6 TC field
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix packet type bitmap
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix alignment
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: use bitmap copy where appropriate
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unnecessary error log
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix 4 bytes alignment for PPPoE dummy...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: search field vector indices for result...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unused DDP package macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix segment in remove existing RSS rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix bitmap for TCP in RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support FDIR for GTPU QFI field
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: replace alloc-followed-by-copy with memdup
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable symmetric hash for RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update FW API minor version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support destination MAC field for FDIR
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable setting up FDIR counters
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable FDIR queue region
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable RSS for PPPoE with SCTP
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: associate switch recipe to profiles
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: refactor data structure
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support switch rule about VLAN PPPoE
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove RSS code as iavf host
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove null check of port info
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: propagate errors from functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix mask for checking protocol header
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add non-word aligned IPv6 field support
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add non-word aligned IPv4 field support
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support tunnel packets
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove redundant empty lines
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: ignore inverse switch recipes
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update profile to recipe bitmap array
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add GENEVE offset
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable RSS with ether layer for PPPoE
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove Rx flex descriptor programming
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add AQC get link topology handle support
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: delay less
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: replace open-code duplication
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update to register definition file
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: correct abbreviations
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unnecessary if branch
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unnecessary dummy packet finding
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update switch training packets with open...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: maximize switch recipe words per line
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: refactor removal of VLAN promiscuous...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix flag settings in AQ call
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unnecessary conditional check
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add RSS support for PPPoE and GTPU
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: packet encapsulation for RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix for RSS hash on inner UDP port
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: consolidate packet type group
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add routine for tunnel port query
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: move and add some help function and macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: improve switch chained recipe
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update UDP tunnel switch training packets
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: return switch error on invalid match...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: associate recipes by profile type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support not locking sideband queue
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add function to configure Tx AQ command
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: initialize driver NVM data earlier
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: set status when global cfg lock is unavailable
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add more opcode and macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update flag bits
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add 32-byte Flex Rx descriptor
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add 16-byte Flex Rx descriptor
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: move function declaration
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: improve switch advanced rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add locks for flow functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support GTP and PPPoE protocols
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support NVM access commands
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update Boot Configuration Section read...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix overrun
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix type-mismatch
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: check root pointer for validity
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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