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net/ice/base: add NVM netlist macros
2020-04-21 Qi Zhangnet/ice/base: add NVM netlist macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: refactor a function
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: use descriptive variable name than type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: use struct size helper
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: replace u16 with enum
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: allow VLAN and ethertype filter for port
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: read PSM clock frequency from register
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: fix removing MAC rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add and update E822 device IDs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: fix uninitialized stack variables
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-03-18 Qi Zhangnet/ice: remove redundant functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-03-18 Qi Zhangnet/ice: remove bulk alloc option
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-03-18 Qi Zhangnet/ice: remove unnecessary variable
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-02-05 Qi Zhangnet/ice: fix GTP-U rule conflict
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-02-05 Qi Zhangnet/ice: fix flow director GTP-U pattern
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: clean up
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice: support 1/10G device IDs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: support adding MAC rules on specific...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: rework flow director desc preparation
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: increase PF reset wait timeout
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: fix loop limit
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: enable clearing of HW tables
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: allow flexbytes matching on header
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: cleanup format of static const declarations
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: do not wait for PE unit to load
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: support MAC/VLAN with TCP/UDP in switch
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/ice/base: whitelist register for NVM access
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: update version info
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf: move device state flag
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: fix adminq return
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: update copyright date
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: support more link speeds
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: update FW API version for X722
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: fix command buffer memory leak
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: increase max VSI count for VFs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: adjust indentation
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: update virtual channel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: rename functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: remove unnecessary compile option
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: remove unused code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: update device IDs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: rename register macro
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: rename error code enum
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-01-17 Qi Zhangnet/iavf/base: remove unnecessary header file
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-26 Qi Zhangnet/ice: fix flow director conflict
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice: add flow mark hint
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice: fix flow type selection for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangdoc: add matching component list for ice
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice/base: update version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice: ignore error when removing RSS rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-20 Qi Zhangnet/ice/base: fix TCAM entry management
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-11 Qi Zhangnet/ice: free HW tables when device closed
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-08 Qi Zhangnet/ice/base: add new device IDs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-08 Qi Zhangnet/ice/base: fix symmetric hash configure
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-11-08 Qi Zhangnet/ice/base: fix ptype mapping pollution from GTP...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: improve misc code style
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: add QFI for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix switch rule programming for all profiles
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix flow raw field vector extraction
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix unexpected switch rule overwrite
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: initialize structures to zero
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: remove dead error condition
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: improve flow director masking
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: support GTPU TEID for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: update flow packet type bitmaps
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix NVGRE switch rule programming
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-23 Qi Zhangnet/ice/base: fix adding PPPoE switch rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unused code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support switch for IPv6 TC field
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix packet type bitmap
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix alignment
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: use bitmap copy where appropriate
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unnecessary error log
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix 4 bytes alignment for PPPoE dummy...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: search field vector indices for result...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove unused DDP package macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix segment in remove existing RSS rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix bitmap for TCP in RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support FDIR for GTPU QFI field
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: replace alloc-followed-by-copy with memdup
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable symmetric hash for RSS
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update FW API minor version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support destination MAC field for FDIR
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable setting up FDIR counters
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable FDIR queue region
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: enable RSS for PPPoE with SCTP
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: associate switch recipe to profiles
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: refactor data structure
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support switch rule about VLAN PPPoE
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove RSS code as iavf host
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove null check of port info
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: propagate errors from functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: fix mask for checking protocol header
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add non-word aligned IPv6 field support
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add non-word aligned IPv4 field support
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: support tunnel packets
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: remove redundant empty lines
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: ignore inverse switch recipes
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: update profile to recipe bitmap array
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2019-10-07 Qi Zhangnet/ice/base: add GENEVE offset
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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