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net/hns3: fix dump register out of range
2021-01-19 Chengchang Tangnet/hns3: fix dump register out of range
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2021-01-19 Chengchang Tangnet/hns3: fix data overwriting during register dump
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2021-01-19 Chengchang Tangnet/hns3: fix register length when dumping registers
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2021-01-19 Hongbo Zhengnet/hns3: use new opcode for clearing hardware resource
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2021-01-19 Chengwen Fengnet/hns3: fix VF query link status in dev init
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2021-01-19 Chengwen Fengnet/hns3: support traffic management
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2021-01-19 Lijun Ounet/hns3: use C11 atomics builtins for resetting
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2021-01-19 Andrew Boyernet/ionic: fix link speed and autonegotiation
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2021-01-19 Andrew Boyernet/ionic: clear up confusion around FC autoneg
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2021-01-19 Andrew Boyernet/ionic: do not add station MAC filter on init
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2021-01-19 Andrew Boyernet/ionic: set port admin state to up in port init
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2021-01-19 Andrew Boyernet/ionic: combine queue init and enable commands
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2021-01-19 Andrew Boyernet/ionic: revise configuration flag handling
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2021-01-19 George Prekasapp/testpmd: fix IP checksum calculation
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Hyong Youb Kimnet/enic: use 64B completion queue entries if available
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2021-01-19 Bruce Richardsonethdev: avoid blocking telemetry for link status
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2021-01-19 David Marchandnet/fm10k: remove vector config
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 David Marchandnet/i40e: remove vector config
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 David Marchandnet/hinic: restore vectorised code
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2021-01-19 Shiri Kuzinnet/mlx5: add GENEVE TLV option flow translation
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2021-01-19 Shiri Kuzinnet/mlx5: add GENEVE TLV option flow validation
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2021-01-19 Shiri Kuzinnet/mlx5: create GENEVE TLV option management
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2021-01-19 Shiri Kuzincommon/mlx5: create GENEVE TLV option object with DevX
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2021-01-19 Shiri Kuzincommon/mlx5: check GENEVE TLV support in HCA attributes
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2021-01-19 Viacheslav Ovsiienkoapp/testpmd: support GENEVE header option length
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2021-01-19 Viacheslav Ovsiienkoapp/testpmd: support GENEVE option item
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2021-01-19 Shiri Kuzinethdev: introduce GENEVE header TLV option item
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/liquidio: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/nfp: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/hinic: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/enetc: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/axgbe: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/cxgbe: fix jumbo frame flag condition
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/ixgbe: fix jumbo frame flag condition
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2021-01-19 Steve Yangnet/thunderx: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/sfc: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/qede: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/octeontx2: fix jumbo frame flag condition for MTU
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2021-01-19 Steve Yangnet/octeontx: fix jumbo frame flag condition for MTU set
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/ipn3ke: fix jumbo frame flag condition for MTU set
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2021-01-19 Steve Yangnet/ice: fix jumbo frame flag condition
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/iavf: fix jumbo frame flag condition
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangnet/i40e: fix jumbo frame flag condition
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2021-01-19 Steve Yangnet/hns3: fix jumbo frame flag condition for MTU set
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2021-01-19 Steve Yangnet/e1000: fix jumbo frame flag condition for MTU set
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2021-01-19 Steve Yangnet/dpaa2: fix jumbo frame flag condition for MTU set
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2021-01-19 Steve Yangnet/dpaa: fix jumbo frame flag condition for MTU set
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2021-01-19 Steve Yangapp/testpmd: fix max Rx packet length for VLAN packets
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Steve Yangethdev: fix max Rx packet length check
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Jiawen Wudoc: update for txgbe
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Haiyue Wangnet/iavf: adjust CRC statistics calculation
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2021-01-19 Jeff Guonet/iavf: add PTYPE mapping for eCPRI
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2021-01-19 Jeff Guonet/ice: add PTYPE mapping for eCPRI
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2021-01-19 Ivan Malovcommon/sfc_efx/base: enhance field ID check in field...
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2021-01-19 Ivan Malovcommon/sfc_efx/base: fix MAE match spec class comparison API
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2021-01-19 Ivan Malovcommon/sfc_efx/base: fix MAE match spec validation...
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2021-01-19 Ivan Malovcommon/sfc_efx/base: fix MPORT related byte order handling
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2021-01-19 Karra Satwikapp/testpmd: allocate FEC capability array dynamically
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Karra Satwiknet/cxgbe: support configuring link FEC
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2021-01-19 Karra Satwiknet/cxgbe: rework and simplify link handling
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2021-01-19 Karra Satwiknet/cxgbe: remove legacy 16-bit link capabilities
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2021-01-19 Karra Satwikapp/testpmd: fix start index for showing FEC array
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Balazs Nemethnet/qede: fix promiscuous enable
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2021-01-19 Xuan Dingnet/ice: fix GTPU header parsing
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2021-01-19 Jeff Guoapp/testpmd: add UDP tunnel port for eCPRI
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Jeff Guoethdev: add eCPRI tunnel type
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Shiri Kuzinnet/mlx5: add GTP PSC item translation
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2021-01-19 Shiri Kuzinnet/mlx5: add GTP PSC flow validation
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2021-01-19 Shiri Kuzincommon/mlx5: add matcher fields for GTP extensions
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2021-01-19 Viacheslav Ovsiienkoapp/testpmd: support GTP PSC option in raw sets
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2021-01-19 Viacheslav Ovsiienkoethdev: update GTP headers
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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2021-01-19 Lijun Ounet/hns3: remove unnecessary memset
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2021-01-19 Min Hu (Connor)net/hns3: fix crash with multi-process
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2021-01-19 Huisong Linet/hns3: fix Rx/Tx errors stats
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2021-01-19 Huisong Linet/hns3: fix error code in xstats
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2021-01-19 Huisong Linet/hns3: fix xstats with id and names
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2021-01-19 Lijun Ounet/hns3: fix interception with flow director
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2021-01-19 Simei Sunet/iavf: fix null pointer dereference in eCPRI rule
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2021-01-19 Leyi Rongnet/i40e: optimize Tx by using AVX512
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2021-01-19 Leyi Rongnet/i40e: add AVX512 vector path
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2021-01-19 Leyi Rongnet/i40e: remove devarg use-latest-supported-vec
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2021-01-19 Weifeng Linet/i40e: fix X722 for 802.1ad frames ability
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2021-01-14 Tal Shnaidermandoc: add Windows support for mlx5
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2021-01-14 Ophir Munkcommon/mlx5: enable compilation on Windows
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2021-01-14 Tal Shnaidermancommon/mlx5: fix pointer cast on Windows
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2021-01-14 Michael Baumcommon/mlx5: remove doorbell allocation functions
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2021-01-14 Michael Baumnet/mlx5: move Rx RQ creation to common
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2021-01-14 Michael Baumcommon/mlx5: share DevX RQ creation
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2021-01-14 Michael Baumnet/mlx5: move ASO SQ creation to common
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2021-01-14 Michael Baumnet/mlx5: move Tx SQ creation to common
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2021-01-14 Michael Baumnet/mlx5: move rearm and clock queue SQ creation to...
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2021-01-14 Michael Baumregex/mlx5: move DevX SQ creation to common
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2021-01-14 Michael Baumcommon/mlx5: share DevX SQ creation
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2021-01-14 Michael Baumcommon/mlx5: enhance page size configuration
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2021-01-14 Michael Baumnet/mlx5: move Rx CQ creation to common
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2021-01-14 Michael Baumnet/mlx5: move Tx CQ creation to common
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2021-01-14 Michael Baumnet/mlx5: move ASO CQ creation to common
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2021-01-14 Michael Baumnet/mlx5: move rearm and clock queue CQ creation to...
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2021-01-14 Michael Baumvdpa/mlx5: move DevX CQ creation to common
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2021-01-14 Michael Baumregex/mlx5: move DevX CQ creation to common
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