hostsim test

[aversive.git] / modules / comm / uart / Makefile

diff --git a/modules/comm/uart/Makefile b/modules/comm/uart/Makefile
index 483f156..28382d0 100644 (file)
--- a/modules/comm/uart/Makefile
+++ b/modules/comm/uart/Makefile
@@ -14,8 +14,8 @@ SRC += uart_send9.c uart_send9_nowait.c
 SRC += uart_recv9.c uart_recv9_nowait.c
 endif
 
-else # is it ok ??
-SRC = uart_host.c
+else
+SRC = uart_host.c uart_events.c
 endif
 
 include $(AVERSIVE_DIR)/mk/aversive_module.mk